NTE1853 Datasheet, PDF (4/6 Pages) NTE Electronics – Integrated Circuit Digital Filter for Compact Disc Digital Audio System

Timing Characteristics (Cont’d):
Parameter
SDAB (Note 9)
Subcode Data Setup Time
Subcode Data Hold Time
Input Rise Time
Input Fall Time
Outputs
WSBD (Note 6 & Note 10)
Word Select Setup Time
Word Select Hold Time
WSBD (Note 6)
Output Rise Time
Output Fall Time
DABD (Note 6 & Note 10)
Data Setup Time
Data Hold Time
Outputs (Cont’d)
DABD (Note 6)
Output Rise Time
Output Fall Time
CLBD (Note 6 & Note 10)
Clock Period
Clock Low Time
Clock High Time
Clock Setup Time
Clock Hold Time
CLBD (Note 6)
Output Rise Time
Output Fall Time
DABD (Note 6 & Note 11)
Data Setup Time
Data Hold Time
Symbol Test Conditions Min
Typ
Max Unit
t_SU, t_SDAT
t_HD, t_SDAT
t_R
t_F
40
–
–
ns
0
–
–
ns
–
–
20
ns
–
–
20
ns
t_SU, t_WS
t_HD, t_WS
t_R
t_F
t_SU, t_DATD
t_HD, t_DATD
40
–
0
–
–
ns
–
ns
–
–
20
ns
–
–
20
ns
40
–
0
–
–
ns
–
ns
t_R
t_F
t_CK
t_CKL
t_CKH
t_SU, t_CLD
t_HD, t_CLD
t_R
t_F
t_SU, t_DATBD
t_HD, t_DATBD
–
–
20
ns
–
–
20
ns
161
177
197 ns
65
–
–
ns
65
–
–
ns
40
–
–
ns
0
–
–
ns
–
–
20
ns
–
–
20
ns
40
–
60
–
–
ns
–
ns
Note 6. Reference levels = 0.8V and 2.0V
Note 7. The signal CLAB can run at either 2.8MHz (¹/₄ system clock) or 1.4MHz (¹/₈ system clock)
under typical conditions. It does not have a minimum or maximum frequency, but is limited
to being ¹/₄ or ¹/₈ of the system clock frequency.
Note 8. Input setup and hold times measured with respect to clock input from A–chip (CLAB). Refer-
ence levels = 0.8V and 2.0V.
Note 9. Input setup and hold times measured with respect to subcode burst clock input from A–chip
(SCAB). Reference levels = 0.8V and 2.0V.
Note10. Output setup and hold times measured with respect to system clock output (XSYS).
Note 11. Output setup and hold times measured with respect to clock output (CLBD).