|
NTE6809 Datasheet, PDF (1/4 Pages) NTE Electronics – Integrated Circuit NMOS, 8-Bit Microprocessor (MPU) | |||
|
NTE6809 & NTE6809E
Integrated Circuit
NMOS, 8âBit Microprocessor (MPU)
Description:
The NTE6809 and NTE6809E are revolutionary high performance 8âbit microprocessors in 40âLead
DIP type packages which support modern programming techniques such as position independece,
reentrancy, and modular programming.
The basic instructions of any computer are greatly enhanced by the presence of powerful addressing
modes. The NTE6809 and NTE6809E have the most complete set of addressing modes available
on any 8âbit microprocessor today.
These devices contain hardware and software features which make them ideal processors for higher
level language execution or standard controller applications. External clock inputs are provided on
the NTE6809E to allow synchronization with peripherals, systems, or other MPUs.
Architectural Features:
D Two 16âBit Index Registers
D Two 16âBit Indexable Stack Pointers
D Two 8âBit Accumulators can be Concatenated to Form One 16âBit Accumulator
D Direct Page Register Allows Direct Addressing Throughout Memory
Hardware Features:
D OnâChip Oscillator (Crystal Frequency = 4 x E), NTE6809 Only
D DMA/BREQ Allows DMA Operation on Memory Refresh, NTE6809 Only
D External Clock Inputs, E and Q, Allow Synchronization, NTE6809E Only
D TSC Input Controls Internal Bus Buffers, NTE6809E Only
D LIC Indicates Opcode Fetch, NTE6809E Only
D AVMA Allows Efficient Use of Common Resource in a Multiprocessor System, NTE6809E Only
D BUSY is a Status Line for Multiprocessing, NTE6809E Only
D Fast Interrupt Request Input Stacks Only Condition Code Register and Program Counter
D MRDY Input Extends Data Across Times for Use with Slow Memory
D Interrupt Acknowledge Output Allows Vectoring by Devices
D Sync Acknowledge Output Allows for Synchronization to External Event
D Single BusâCycle RESET
D Single 5V Supply Operation
D NMI Inhibited After RESET Until After First Load Stack Pointer
D Early Address Valid Allows Use with Slower Memories
D Early Write Data for Dynamic Memories
|
▷ |