NTE1739 Datasheet, PDF (1/3 Pages) NTE Electronics – Integrated Circuit TV Horizontal/Vertical Countdown Digital Sync System

NTE1739
Integrated Circuit
TV Horizontal/Vertical Countdown
Digital Sync System
Features:
D Horizontal Oscillator
D Vertical Countdown
D Composite Blanking Output
D Burst–Gate Output
D Horizontal Ramp Generator
D Internal Shunt Regulator
Description:
The NTE1739 is a video sync system in a 16–Lead DIP type package designed for use in television,
monitor or video display products. The NTE1739 contains a horizontal phase–locked oscillator and
vertical countdown. It also features composite blanking and burst–gate outputs which, when external-
ly summed, produce the sandcastle pulse necessary for the operation of most chroma/luma circuits.
The NTE1739 is intended for use in 525–line systems and operates with standard or nonstandard
input signals. An automatic mode–recognition circuit forces operation into the nonsynchronous mode
for nonstandard sync input signals.
Absolute Maximum Ratings:
DC Supply Current, Pin7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Input Voltage (All Inputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1V to V+ + 1V
Device Dissipation (T_A ≤ +85°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900mW
Derate Linearly Above 85°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14mW/°C
Operating Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40° to +85°C
Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65° to +150°C
Lead Temperature (During Soldering, 1/16 ±1/32 in. (1.59 ± 0.79mm) from case, 10s max) . . . +265°C
Circuit Operation
The master oscillator operates at 8 times the horizontal rate, fH, as determined by the external LC
connected between Pin5 and Pin6. The master oscillator is divided by 2, 4, and 8 and is then fed to
the horizontal output amplifier and also to a 10–stage vertical countdown circuit. Horizontal AFC is
performed by comparing the horizontal ramp input signal on Pin2, derived from the flyback pulse, to
the horizontal sync signal on Pin3, producing correction voltage. The correction voltage then is ap-
plied to the master oscillator to phase lock the system.
The divide by 2 and 4 outputs are used to drive a 10–stage counter for the vertical circuits. The use
of the countdown system and associated logic circuits assures good noise immunity and the deletion
of the vertical hold control.