DS90C383 Datasheet, PDF (9/20 Pages) National Semiconductor (TI) – +3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz, +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link-65 MHz

AC Timing Diagrams (Continued)
FIGURE 13. Seven Bits of LVDS in Once Clock Cycle
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FIGURE 14. 21 Parallel TTL Data Inputs Mapped to LVDS Outputs
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FIGURE 15. Transmitter Power Down Delay
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