LMC6953 Datasheet, PDF (8/12 Pages) National Semiconductor (TI) – PCI Local Bus Power Supervisor

Truth Table
Power
Failure
Fail
X
X
X
X
X
OK
X = Don’t Care
5V
Over-Voltage
X
Fail
X
X
X
X
OK
5V
Under-Voltage
X
X
Fail
X
X
X
OK
3.3V
Over-Voltage
X
X
X
Fail
X
X
OK
3.3V
Under-Voltage
X
X
X
X
Fail
X
OK
MR RESET
High
High
High
High
High
Low
High
Low
Low
Low
Low
Low
Low
High
Pin Description
Pin
Name
1
V_DD
2
5V
3
3.3V
4
MR
5
PWR__GND
6
GND
7
RESET
8
C_EXT
Function
5V input supply voltage. This pin supplies power to the internal comparators. It can be
connected to a capacitor acting as a back-up battery. Otherwise, it should be shorted
to the 5V pin.
5V input supply voltage. This pin is not connected to the positive power supply of the
internal comparators. It provides input signal to the 5V window comparators as well as
the power failure comparator.
3.3V input supply voltage. This pin provides input signal to the 3.3V window
comparators and the power failure comparator.
Manual reset input pin. It takes 5V CMOS logic low and triggers RESET . If not used,
this pin should be connected to V_DD.
Ground.
This pin should be grounded at all times.
Active low reset output. RESET holds low for 100 ms after both 5V and 3.3V powers
recover, or after manual reset signal returns to high state.
External capacitor pin. The value of C_EXT sets the reset delay.
Application Note
HOW THE LMC6953 FUNCTIONS
The LMC6953 is a power supply supervisor with its perfor-
mance specifications compliant to PCI Specifications Revi-
sion 2.1. The chip monitors power-up, power-down,
brown-out, power failure and manual reset interrupt situa-
tions.
During power-up, the LMC6953 holds RESET low for 100
ms after both 5V and 3.3V are within specified windows. It
asserts reset in 490 ns when a brown-out is detected.
Brown-out occurs when 5V supply is above 5.75V
over-voltage or below 4.25V under-voltage or when 3.3V
supply is above 4.1V over-voltage or 2.5V under-voltage. In
case of power failure where the 5V supply falls under 3.3V
supply by 300 mV maximum, reset is asserted in 90 ns. RE-
SET also can be asserted by sending a 5V CMOS logic low
to the manual reset pin.
Each time RESET is asserted, it holds low for 100 ms after a
fault condition is recovered. The 100 ms reset delay is gen-
erated by the 0.01 µF C_EXT capacitor, and can be adjusted
by changing the value of C_EXT.
It is highly recommended to place lands on printed circuit
boards for 120 pF capacitors between pin 2 and ground and
also between pin 3 and ground. As power supplies may
change abruptly, there can be very high frequency noise
present and the capacitors can minimize the noise,
MINIMUM SUPPLY VOLTAGE FOR RESET ASSERTION
The LMC6953 guarantees V_DD = 1.55V as the minimum
supply voltage to achieve consistent RESET assertion. This
ensures system stability in initialization state.
DS012846-12
FIGURE 1. Output Voltage vs Supply Voltage
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