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LM3150 Datasheet, PDF (8/20 Pages) National Semiconductor (TI) – SIMPLE SWITCHER® CONTROLLER, 42V Synchronous Step-Down
Theory of Operation
The LM3150 synchronous step-down SIMPLE SWITCHER®
Controller utilizes a Constant On-Time (COT) architecture
which is a derivative of the hysteretic control scheme. COT
relies on a fixed switch on-time to regulate the output. The on-
time of the high-side switch can be set manually by adjusting
the size of an external resistor (RON). To maintain a relatively
constant switching frequency as VIN varies, the LM3150 au-
tomatically adjusts the on-time inversely with the input volt-
age. Assuming an ideal system and VIN is much greater than
1V, the following approximations can be made:
The on-time, tON:
(1)
Where constant K = 100 pC
The RON resistance value can be calculated as follows:
(2)
Where fs is the desired switching frequency.
Control is based on a comparator and the on-timer, with the
output voltage feedback (FB) compared with an internal ref-
erence of 0.6V. If the FB level is below the reference, the high-
side switch is turned on for a fixed time, tON, which is
determined by the input voltage and the resistor RON. Follow-
ing this on-time, the switch remains off for a minimum off-time,
tOFF, as specified in the Electrical Characteristics table or until
the FB pin voltage is below the reference, then the switch
turns on again for another on-time period. The switching will
continue in this fashion to maintain regulation. During contin-
uous conduction mode (CCM), the switching frequency ide-
ally depends on duty-cycle and on-time only. In a practical
application however, there is a small delay in the time that the
HG goes low and the SW node goes low that also affects the
switching frequency that is accounted for in the typical appli-
cation curves. The duty-cycle and frequency can be approx-
imated as:
(3)
(4)
Typical COT hysteretic controllers need a significant amount
of output capacitor ESR to maintain a minimum amount of
ripple at the FB pin in order to switch properly and maintain
efficient regulation. The LM3150 however, utilizes a propri-
etary Emulated Ripple Mode control scheme (ERM) that al-
lows the use of low ESR output capacitors. Not only does this
reduce the need for high output capacitor ESR, but also sig-
nificantly reduces the amount of output voltage ripple seen in
a typical hysteretic control scheme. The output ripple voltage
can become so low that it is comparable to voltage-mode and
current-mode control schemes.
Programming the Output Voltage
The output voltage is set by two external resistors
(RFB1,RFB2). The regulated output voltage is calculated as fol-
lows:
(5)
Where RFB2 is the top resistor connected between VOUT and
FB, and RFB1 is the bottom resistor connected between FB
and GND.
Regulation Comparator
The feedback voltage at FB is compared to the internal ref-
erence voltage of 0.6V. In normal operation (the output volt-
age is regulated), an on-time period is initiated when the
voltage at FB falls below 0.6V. The high-side switch stays on
for the on-time, causing the FB voltage to rise above 0.6V.
After the on-time period, the high-side switch stays off until
the FB voltage falls below 0.6V.
Over-Voltage Comparator
The over-voltage comparator is provided to protect the output
from over-voltage conditions due to sudden input line voltage
changes or output loading changes. The over-voltage com-
parator continuously monitors the voltage at the FB pin and
compares it to a 0.72V internal reference. If the voltage at FB
rises above 0.72V, the on-time pulse is immediately termi-
nated. This condition can occur if the input or the output load
changes suddenly. Once the over-voltage protection is acti-
vated, the HG and LG signals remain off until the voltage at
FB pin falls below 0.72V.
Current Limit
Current limit detection occurs during the off-time by monitor-
ing the current through the low-side switch using an external
resistor, RLIM. If during the off-time the current in the low-side
switch exceeds the user defined current limit value, the next
on-time cycle is immediately terminated. Current sensing is
achieved by comparing the voltage across the low side FET
with the voltage across the current limit set resistor RLIM. If the
voltage across RLIM and the voltage across the low-side FET
are equal then the current limit comparator will terminate the
next on-time cycle.
The RLIM value can be approximated as follows:
(6)
(7)
Where IOCL is the user-defined average output current limit
value, RDS(ON)max is the resistance value of the low-side FETat
the expected maximum FET junction temperature, and ILIM-
TH is an internal current supply of 85 µA typical.
Figure 1 illustrates the inductor current waveform. During nor-
mal operation, the output current ripple is dictated by the
switching of the FETs. The current through the low-side
switch, Ivalley, is sampled at the end of each switching cycle
and compared to the current limit, ICL, current. The valley cur-
rent can be calculated as follows:
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