DP83924BVCE Datasheet, PDF (8/42 Pages) National Semiconductor (TI) – Quad 10 Mb/s Ethernet Physical Layer - 4TPHY™

1.0 Pin Information (Continued)
Symbol
NC
NC
NC
NC
NC
VDD_TPI_4 VDD_TPI_3
VDD_TPI_2 VDD_TPI_1
GND_TPI_4
GND_TPI_3
GND_TPI_2
GND_TPI_1
VDD_PLL_2
VDD_PLL_1
GND_PLL_4
GND_PLL_3
GND_PLL_2
GND_PLL_1
VDD_WSPLL_1
GND_WSPLL_1
VDD_WS_1
GND_WS_1
VDD_DIG
GND_DIG
GND_CLK
VDD_CLK
GND_2 GND_1
VDD_1
Table 5. POWER AND GROUND Pins (33 Pins)
Pins
Type
Description
48
NA
No Connect;
49
50
80
81
98
99
100
27
P
Power for TPI Ports 1-4;
21
15
9
28
G
Ground for TPI Ports 1-4;
22
16
10
67
P
Power for PLL Circuitry;
63
(Digital PLL)
66
G
Ground for PLL Circuitry;
65
64
(Digital PLL)
62
68
P
Power for Wave Shaper and PLL Circuitry;
(Analog PLL)
69
G
Ground for Wave Shaper and PLL Circuitry;
31
P
Power for Wave Shaper Circuitry
32
G
Ground for Wave Shaper Circuitry
86
P
Power for Core Logic;
85
G
Ground for Core Logic;
96
G
Ground for Clock Circuitry;
97
P
Power for Clock Circuitry;
91
G
Ground for NRZ Circuitry;
53
70
P
Power for NRZ Circuitry;
Pin Type
I
O
I/O
O, Z
OD
Table 6. Pin Type Description
Description
Input Buffer
Output Buffer (driven at all times)
Bi-directional Buffer.
Output Buffer with High Impedance Capability
Open Drain-Like Output. Either driven Low or to a High Impedance State.
8
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