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DAC0854 Datasheet, PDF (8/14 Pages) National Semiconductor (TI) – 8-Bit Voltage-Output
Block Diagram
Pin Description
VOUT1(19)
VOUT2(1)
VOUT3(14)
VOUT4(11)
VREFOUT(16)
VBIAS1(2)
VBIAS2(13)
GND(7)
DVCC(10)
AVCC(17)
The voltage output connections of the
four DACS These provide output
voltages in the range 0 3V–2 8V
The internal voltage reference output
The output of the reference is 2 65V
g2% This pin should be bypassed with
a 220 mF capacitor
VBIAS1 is connected to the non-inverting
inputs of output amplifiers 1 and 2
thereby setting the virtual ground
voltage for DAC’s 1 and 2 while VBIAS2
performs this function for DAC’s 3 and 4
The allowed range is 0 3V –1 4V
The system ground pin Connect to
clean ground point
The digital and analog power supply
pins The power supply range of the
DAC0854 is 4 5V – 5 5V To guarantee
accuracy it is required that the AVCC
and DVCC pins be bypassed separately
with bypass capacitors of 10 mF
tantalum in parallel with 0 1 mF ceramic
TL H 11261 – 15
AU(4)
VREF1(18)
VREF2(20)
VREF3(15)
VREF4(12)
CS(3)
CLK(5)
DI(9)
DO(6)
INT(8)
When this pin is taken low all DAC outputs
will be asynchronously updated CS must be
held high during the update
The voltage reference inputs for the four
DACs The allowed range is 0V – 2 75V
The Chip Select control input This input is
active low
The external clock input pin
The serial data input The data is clocked in
LSB first Preceding the data byte are 4 or 6
bits of instructions
The serial data output The data can be
clocked out either MSB or LSB first and on
either the positive or negative edge of the
clock
The power interrupt output On an
interruption of the power supply this pin
goes low Since this pin has an open drain
output a 10 kX pull-up resistor must be
connected to the supply
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