SM72485 Datasheet, PDF (7/16 Pages) National Semiconductor (TI) – SolarMagic 100V, 150 mA Constant On-Time Buck Switching Regulator

The SM72485 regulates the output voltage based on ripple
voltage at the feedback input, requiring a minimum amount of
ESR for the output capacitor C2. A minimum of 25mV to 50mV
of ripple voltage at the feedback pin (FB) is required for the
SM72485. In cases where the capacitor ESR is too small,
additional series resistance may be required (R3 in the Block
Diagram).
For applications where lower output voltage ripple is required
the output can be taken directly from a low ESR output ca-
pacitor, as shown in Figure 1. However, R3 slightly degrades
the load regulation.
FIGURE 1. Low Ripple Output Configuration
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Start-Up Regulator (V_CC)
The high voltage bias regulator is integrated within the
SM72485. The input pin (VIN) can be connected directly to
line voltages between 6V and 95V, with transient capability to
100V. Referring to the block diagram and the graph of V_CC vs
V_IN, when V_IN is between 6V and the bypass threshold (nom-
inally 8.5V), the bypass switch (Q2) is on, and V_CC tracks
V_IN within 100 mV to 150 mV. The bypass switch on-resis-
tance is approximately 100Ω, with inherent current limiting at
approximately 100 mA. When V_IN is above the bypass thresh-
old Q2 is turned off, and V_CC is regulated at 7V. The V_CC
regulator output current is limited at approximately 9.2 mA.
When the SM72485 is shutdown using the RT/SD pin, the
V_CC bypass switch is shut off regardless of the voltage at
V_IN.
When VIN exceeds the bypass threshold, the time required
for Q2 to shut off is approximately 2 - 3 µs. The capacitor at
VCC (C3) must be a minimum of 0.47 µF to prevent the volt-
age at VCC from rising above its absolute maximum rating in
response to a step input applied at V_IN. C3 must be located
as close as possible to the VCC and RTN pins. In applications
with a relatively high input voltage, power dissipation in the
bias regulator is a concern. An auxiliary voltage of between
7.5V and 14V can be diode connected to the VCC pin to shut
off the V_CC regulator, thereby reducing internal power dissi-
pation. The current required into the VCC pin is shown in the
graph “I_CC Current vs. Applied V_CC Voltage”. Internally a diode
connects VCC to VIN requiring that the auxiliary voltage be
less than V_IN.
The turn-on sequence is shown in Figure 2. During the initial
delay (t1) VCC ramps up at a rate determined by its current
limit and C3 while internal circuitry stabilizes. When V_CC
reaches the upper threshold of its under-voltage lock-out (UV-
LO, typically 5.3V) the buckswitch is enabled. The inductor
current increases to the current limit threshold (I_LIM) and dur-
ing t2 V_OUT increases as the output capacitor charges up.
When V_OUT reaches the intended voltage the average induc-
tor current decreases (t3) to the nominal load current (I_O).
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