ADC128S102QML Datasheet, PDF (7/22 Pages) National Semiconductor (TI) – 8-Channel, 50 kSPS to 1 MSPS, 12-Bit A/D Converter

Timing Specifications
The following specifications apply for V_A = V_D = +2.7V to +5.25V, AGND = DGND = 0V, f_SCLK = 0.8 MHz to 16 MHz, f_SAMPLE = 50
kSPS to 1 MSPS, and C_L = 50pF. Boldface limits apply for T_A = T_MIN to T_MAX: all other limits T_A = 25°C.
Symbol
Parameter
Conditions
Notes
Typical
(Note 6)
Min
Max
Units
Sub-
groups
t_CSH
CS Hold Time after SCLK
Rising Edge
(Note
8)
0
10
ns 9, 10, 11
t_CSS
CS Setup Time prior to SCLK
Rising Edge
(Note
8)
4.5
10
ns 9, 10, 11
t_EN
CS Falling Edge to DOUT
enabled
5
30
ns 9, 10, 11
t_DACC
DOUT Access Time after
SCLK Falling Edge
17
27
ns 9, 10, 11
t_DHLD
DOUT Hold Time after SCLK
Falling Edge
4
11
ns 9, 10, 11
t_DS
DIN Setup Time prior to
SCLK Rising Edge
3
10
ns 9, 10, 11
t_DH
DIN Hold Time after SCLK
Rising Edge
3
10
ns 9, 10, 11
t_CH SCLK High Time
t_CL SCLK Low Time
t_DIS
CS Rising Edge to DOUT
High-Impedance
DOUT falling
DOUT rising
0.4 X
t_SCLK
0.4 X
t_SCLK
2.4
0.9
ns (min)
ns (min)
20
ns 9, 10, 11
20
ns 9, 10, 11
Radiation Electrical Characteristics
(Note 9)
The following specifications apply for V_A = V_D = +2.7V to +5.25V, AGND = DGND = 0V, f_SCLK = 0.8 MHz to 16 MHz, f_SAMPLE = 50
kSPS to 1 MSPS, and C_L = 50pF, T_A = 25°C.
Symbol
Parameter
Conditions
Notes Typical Min
Sub-
Max Units _groups
I_A + I_D
I_OZH, I_OZL
Total Supply Current
Shutdown Mode (CS high)
Hi-Impedance Output
Leakage Current
V_A = V_D = +2.7V to +3.6V,
f_SCLK = 0 kSPS
V_A = V_D = +4.75V to +5.25V,
f_SCLK = 0 kSPS
V_A = V_D = +2.7V to +5.25V
30
µA
1
100
µA
1
±10
µA
1
7
www.national.com