TLDD6932COP472 Datasheet, PDF (6/8 Pages) National Semiconductor (TI) – COP472-3 Liquid Crystal Display Controller

LOADING SEQUENCE TO DRIVE A 4 -DIGIT DISPLAY
Steps
1 Turn CE low
2 Clock in 8 bits of data for digit 1
3 Clock in 8 bits of data for digit 2
4 Clock in 8 bits of data for digit 3
5 Clock in 8 bits of data for digit 4
6 Clock in 8 bits of data for special segment and control
function of BPC and BPA
0 0 1 1 SP4 SP3 SP2 SP1
7 Turn CS high
Note CS may be turned high after any step For example to
load only 2 digits of data do steps 1 2 3 and 7
CS must make a high to low transition before loading data in
order to reset internal counters
LOADING SEQUENCE TO DRIVE AN
8 -DIGIT DISPLAY
Two or more COP472-3’s may be connected together to
drive additional segments An eight digit multiplexed display
is shown in Figure 7 The following is the loading sequence
to drive an eight digit display using two COP472-3’s The
right chip is the master and the left the slave
Steps
1 Turn CS low on both COP472-3’s
2 Shift in 32 bits of data for the slave’s four digits
3 Shift in 4 bits of special segment data a zero and three
ones
1 1 1 0 SP4 SP3 SP2 SP1
This synchronizes both the chips and BPA is oscillator
input Both chips are now stopped
4 Turn CS high to both chips
5 Turn CS low to master COP472-3
6 Shift in 32 bits of data for the master’s 4 digits
7 Shift in four bits of special segment data a one and
three zeros
0 0 0 1 SP4 SP3 SP2 SP1
This sets the master COP472-3 to BPA as a normal
backplane output and BPC as oscillator output Now
both the chips start and run off the same oscillator
8 Turn CS high
The chips are now synchronized and driving 8 digits of dis-
play To load new data simply load each chip separately in
the normal manner keeping the correct status bits to each
COP472-3 (0110 or 0001)
TL DD 6932 – 6
FIGURE 6 System Diagram – 4 Digit Display
TL DD 6932 – 7
FIGURE 7 System Diagram – 8 Digit Display
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