NM93C06L Datasheet, PDF (6/12 Pages) National Semiconductor (TI) – 256-/1024-/2048-/4096-Bit Serial EEPROM with Extended Voltage (2.7V to 5.5V) (MICROWIRE Bus Interface)

Functional Description (Continued)
Write (WRITE)
The WRITE instruction is followed by 16 bits of data to be
written into the specificed address After the last bit of data
is put on the data-in (DI) pin CS must be brought low before
the next rising edge of the SK clock This falling edge of CS
initiates the self-timed programming cycle The DO pin indi-
cates the READY BUSY status of the chip if CS is brought
high after the t_CS interval DO e logical 0 indicates that
programming is still in progress DO e logical 1 indicates
that the register at the address specified in the instruction
has been written with the data pattern specified in the in-
struction and the part is ready for another instruction
Erase All (ERAL)
The ERAL instruction will simultaneously program all regis-
ters in the memory array and set each bit to the logical ‘‘1’’
state The Erase All cycle is identical to the ERASE cycle
except for the different op-code As in the ERASE mode
the DO pin indicates the READY BUSY status of the chip if
CS is brought high after the t_CS interval
Write All (WRALL)
The WRALL instruction will simultaneously program all reg-
isters with the data pattern specified in the instruction As in
the WRITE mode the DO pin indicates the READY BUSY
status of the chip if CS is brought high after the t_CS interval
Write Disable (WDS)
To protect against accidental data distrub the WDS instruc-
tion disables all programming modes and should follow all
programming operations Execution of a READ instruction is
independent of both the WEN and WDS instructions
Note NSC CMOS EEPROMs do not require an ‘‘ERASE’’ or ‘‘ERASE ALL’’ operation prior to the ‘‘WRITE’’ and ‘‘WRITE ALL’’ instructions The ‘‘ERASE’’ and
‘‘ERASE ALL’’ instructions are included to maintain compatibility with earlier technology EEPROMs
Instruction Set for the NM93C06L and NM93C46L
Instruction
SB
Op Code
Address
READ
1
10
A5 – A0
WEN
1
00
11XXXX
ERASE
1
11
A5 – A0
WRITE
1
01
A5 – A0
ERAL
1
00
10XXXX
WRALL
1
00
01XXXX
WDS
1
00
00XXXX
Note Address bits A5 and A4 become ‘‘Don’t Care’’ for the NM93C06L
Data
D15 – D0
D15 – D0
Comments
Reads data stored in memory at specified address
Enable all programming modes
Erase selected register
Writes selected register
Erases all registers
Writes all registers
Disables all programming modes
Instruction Set for the NM93C56L and NM93C66L
Instruction
SB
Op Code
Address
READ
1
10
A7 – A0
WEN
1
00
11XXXXXX
ERASE
1
11
A7 – A0
WRITE
1
01
A7 – A0
ERAL
1
00
10XXXXXX
WRALL
1
00
01XXXXXX
WDS
1
00
00XXXXXX
Note Address bit A7 is ‘‘Don’t Care’’ for the NM93C56L
Data
D15 – D0
D15 – D0
Comments
Reads data stored in memory at specified address
Enable all programming modes
Erase selected register
Writes selected register
Erases all registers
Writes all registers
Disables all programming modes
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