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LP3873_06 Datasheet, PDF (6/16 Pages) National Semiconductor (TI) – 3A Fast Ultra Low Dropout Linear Regulators
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Electrical Characteristics
LP3873/LP3876 (Continued)
Limits in standard typeface are for TJ = 25˚C, and limits in boldface type apply over the full operating temperature range.
Unless otherwise specified: VIN = VO(NOM) + 1.5V, IL = 10 mA, COUT = 10µF, VSD = 2V.
Symbol
Parameter
Conditions
Typ
(Note 4)
LP3873/6 (Note 5)
Min
Max
Units
SHUTDOWN INPUT
VSDT
Shutdown Threshold
Output = High
Output = Low
VIN
2
V
0
0.3
TdOFF
Turn-off delay
IL = 3A
20
µs
TdON
Turn-on delay
IL = 3A
25
µs
ISD
SD Input Current
VSD = VIN
1
nA
ERROR FLAG
VT
VTH
VEF(Sat)
Td
Threshold
Threshold Hysteresis
Error Flag Saturation
Flag Reset Delay
(Note 9)
(Note 9)
Isink = 100µA
10
5
16
%
5
2
8
%
0.02
0.1
V
1
µs
Ilk
Error Flag Pin Leakage
Current
1
nA
Imax
Error Flag Pin Sink
VError = 0.5V
1
mA
Current
AC PARAMETERS
VIN = VOUT + 1.0V
73
COUT = 10uF
PSRR
Ripple Rejection
VOUT = 3.3V
dB
VIN = VOUT + 0.5V
57
COUT = 10uF
VOUT = 3.3V
ρn(l/f
Output Noise Density
f = 120Hz
0.8
µV
BW = 10Hz – 100kHz
150
en
Output Noise Voltage
VOUT = 2.5V
BW = 300Hz – 300kHz
100
VOUT = 2.5V
µV (rms)
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is
intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and test conditions, see Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed
test conditions.
Note 2: At elevated temperatures, devices must be derated based on package thermal resistance. The devices in TO220 package must be derated at θjA = 50˚C/W
(with 0.5in2, 1oz. copper area), junction-to-ambient (with no heat sink). The devices in the TO263 surface-mount package must be derated at θjA = 60˚C/W (with
0.5in2, 1oz. copper area), junction-to-ambient. See Application Hints.
Note 3: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
Note 4: Typical numbers are at 25˚C and represent the most likely parametric norm.
Note 5: Limits are guaranteed by testing, design, or statistical correlation.
Note 6: If used in a dual-supply system where the regulator load is returned to a negative supply, the output must be diode-clamped to ground.
Note 7: The output PMOS structure contains a diode between the VIN and VOUT terminals. This diode is normally reverse biased. This diode will get forward biased
if the voltage at the output terminal is forced to be higher than the voltage at the input terminal. This diode can typically withstand 200mA of DC current and 1Amp
of peak current.
Note 8: Output voltage line regulation is defined as the change in output voltage from the nominal value due to change in the input line voltage. Output voltage load
regulation is defined as the change in output voltage from the nominal value due to change in load current. The line and load regulation specification contains only
the typical number. However, the limits for line and load regulation are included in the output voltage tolerance specification.
Note 9: Error Flag threshold and hysteresis are specified as percentage of regulated output voltage. See Application Hints.
Note 10: Dropout voltage is defined as the minimum input to output differential voltage at which the output drops 2% below the nominal value. Dropout voltage
specification applies only to output voltages of 2.5V and above. For output voltages below 2.5V, the drop-out voltage is nothing but the input to output differential,
since the minimum input voltage is 2.5V.
Note 11: The minimum operating value for VIN is equal to either [VOUT(NOM) + VDROPOUT] or 2.5V, whichever is greater.
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