LMH0384 Datasheet, PDF (6/16 Pages) National Semiconductor (TI) – 3 Gbps HD/SD SDI Extended Reach and Configurable Adaptive Cable Equalizer

Pin
7
8
9
10
11
12
13
14
15
16
DAP
Name
BYPASS
I/O, Type
I, LVCMOS
MUTE_REF
I, Analog
V_EE
SDO
I, LVCMOS
O, LVDS
SDO
O, LVDS
AUTO SLEEP I, LVCMOS
V_CC
MUTE
Power
I, LVCMOS
CD
O, LVCMOS
V_CC
Power
V_EE
Ground
Description
Equalization bypass. This pin has an internal pulldown.
H = Equalization is bypassed (no equalization occurs).
L = Normal operation.
Mute reference input. Sets the threshold for CD and (with CD tied to MUTE)
determines the maximum cable to be equalized before muting. MUTE_REF may be
either unconnected or connected to ground for normal CD operation.
Connect this pin to ground or drive it logic low.
Serial data complement output.
Serial data true output.
Auto Sleep. AUTO SLEEP has precedence over MUTE and BYPASS. This pin has
an internal pullup.
H = Device will power down when no input is detected.
L = Normal operation (device will not enter auto power down).
Positive power supply (+3.3V).
Output mute. CD may be tied to this pin to inhibit the output when no input signal is
present. MUTE has precedence over BYPASS. This pin has an internal pulldown.
H = Outputs forced to a muted state.
L = Outputs enabled.
Carrier detect.
H = No input signal detected.
L = Input signal detected.
Positive power supply (+3.3V).
Connect exposed DAP to negative power supply (ground).
Pin Descriptions – SPI Mode / SPI_EN = V_CC
Pin
Name
1
V_EE
2
SDI
I/O, Type
Ground
I, SDI
Description
Negative power supply (ground).
Serial data true input.
3
SDI
4
SPI_EN
5
AEC+
I, SDI
I, LVCMOS
I/O, Analog
Serial data complement input.
SPI register access enable. This pin has an internal pulldown.
H = SPI register access mode.
L = Pin mode.
AEC loop filter external capacitor (1µF) positive connection.
6
AEC-
7
CD
8
MUTE_REF
9
SS (SPI)
10 SDO
I/O, Analog
O, LVCMOS
I, Analog
I, LVCMOS
O, LVDS
AEC loop filter external capacitor (1µF) negative connection.
Carrier detect.
H = No input signal detected.
L = Input signal detected.
Mute reference input. Sets the threshold for CD and (with CD tied to MUTE)
determines the maximum cable to be equalized before muting. MUTE_REF may be
either unconnected or connected to ground for normal CD operation.
SPI slave select. This pin has an internal pullup.
Serial data complement output.
11
12
13
14
15
16
DAP
SDO
MISO (SPI)
V_CC
SCK (SPI)
MOSI (SPI)
V_CC
V_EE
O, LVDS
O, LVCMOS
Power
I, LVCMOS
I, LVCMOS
Power
Ground
Serial data true output.
SPI Master Input / Slave Output. LMH0384 data transmit.
Positive power supply (+3.3V).
SPI serial clock input.
SPI Master Output / Slave Input. LMH0384 data receive.
Positive power supply (+3.3V).
Connect exposed DAP to negative power supply (ground).
www.national.com
6