DS92LV222A Datasheet, PDF (6/8 Pages) National Semiconductor (TI) – Two Channel Bus LVDS MUXed Repeater

Function Select Table
MODE SELECTED
Receiver Zero ON, Driver Zero ON, Driver One OFF
Receiver Zero ON, Driver Zero OFF, Driver One ON
Receiver One ON, Driver Zero ON, Driver One OFF
Receiver One ON, Driver Zero OFF, Driver One ON
Receiver Zero ON, Driver Zero ON, Driver One ON
Receiver One ON, Driver Zero ON, Driver One ON
Driver Zero and Driver One TRI-STATE
DE0 DE1 RSEL
H
LL
L
HL
H
LH
L
HH
H
HL
H
HH
L
LX
Truth Table for Receiver Zero
Truth Table for Receiver One
DE0 RSEL
H
L
H
L
H
L
L
X
INPUTS
(RI0+)–(RI0−)
L
H
100 mV > & > −100 mV
X
X = High or low logic state
Z = High impedance state
L = Low state
OUTPUTS
DO+ DO−
L
H
H
L
X
X
Z
Z
DE1 RSEL
H
H
H
H
H
H
L
X
INPUTS
(RI1+)–(RI1−)
L
H
100 mV > & > −100 mV
X
X = High or low logic state
Z = High impedance state
L = Low state
OUTPUTS
DO+ DO−
L
H
H
L
X
X
Z
Z
Truth Table for Current Drive
Driver
Driver 0
Driver 0
Driver 1
Driver 1
Current Drive
3.5 mA
8.5 mA
3.5 mA
8.5 mA
ISEL0
H
L
X
X
ISEL1
X
X
H
L
Applications Information
There are few common practices which should be employed
when designing PCB for Bus LVDS signaling. Recom-
mended practices are:
• Use at least 4 PCB board layer (Bus LVDS signals,
ground, power and TTL signals).
• Keep drivers and receivers as close to the (Bus LVDS
port side) connector as possible.
• Bypass each Bus LVDS device and also use distributed
bulk capacitance. Surface mount capacitors placed close
to power and ground pins work best. Two or three multi-
layer ceramic (MLC) surface mount capacitors (0.1µ and
0.01 µF in parallel should be used between each V_CC and
ground. The capacitors should be as close as possible to
the V_CC pin.
• Use controlled impedance traces which match the differ-
ential impedance of your transmission medium (i.e.,
Cable) and termination resistor.
• Use the termination resistor which best matches the dif-
ferential impedance of your transmission line.
• Leave unused Bus LVDS receiver inputs open (floating).
• Isolate TTL signals from Bus LVDS signals.
• Balanced cables (e.g., twisted pair) are usually better
than unbalanced cables (ribbon cable, simple coax) for
noise reduction and signal quality.
•
• There are different types of failsafe situations to consider,
these are Open Input, Terminated Input, and other spe-
cial cases. The first, Open input failsafe occurs when only
one receiver is being used (R0 for example). The unused
receiver (R1) inputs should be left open for noise minimi-
zation. The second case is for terminated inputs. This oc-
curs when the inputs have a low impedance (typically 100
Ohm) termination (R _T) across them, and the cable is un-
plugged. For this case, and if the output state needs to
maintain a known state, two external bias resistors may
be used to provide a strong common mode bias point.
For this a 10K Ohm pull up and pull down resistor may be
used to set the output high. Note that R₁ and R₂ should
be much larger ( 2 orders of magnitude) compared to R _T
to minimize loading effects to the Bus LVDS driver when
it is active.
MEDIA (CABLE, CONNECTOR OR BACKPLANE)
SELECTION:
• Use controlled impedance media. The cables and con-
nectors should have a matched differential impedance.
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