DS89C387 Datasheet, PDF (6/10 Pages) National Semiconductor (TI) – Twelve Channel CMOS Differential Line Driver

Application Information (Continued)
Waveforms for Circuit 1
Waveforms for Circuit 2
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FIGURE 7. Propagation Delay Waveforms for Circuit 1 and Circuit 2 (See Figure 6)
In Figure 2, VX, where X is a number, is the waveform volt-
age level at which the propagation delay measurement ei-
ther starts or stops. Furthermore, V1 and V2 are normally
identical. The same is true for V3 and V4. However, as men-
tioned before, these levels are not standardized and may
vary, even with similar devices from other companies. Also
note, NC (no connection) in Figure 1 means the pin is not
used in propagation delay measurement for the correspond-
ing circuit.
The single-ended skew provides information about the pulse
width distortion of the output waveform. The lower the skew,
the less the output waveform will be distorted. For best case,
skew would be zero, and the output duty cycle would be
50%, assuming the input has a 50% duty cycle.
However, if V3 and V4 are specified voltages, then V3 and
V4 are less likely to be equal to the crossing point voltage.
Thus, the differential propagation delays will not be mea-
sured to zero volts on the differential waveform.
The differential skew also provides information about the
pulse width distortion of the differential output waveform rela-
tive to the input waveform. The higher the skew, the greater
the distortion of the differential output waveform. Assuming
the input has a 50% duty cycle, the differential output will
have a 50% duty cycle if skew equals zero and less than a
50% duty cycle if skew is greater than zero.
(Circuit 4)
(Circuit 3)
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FIGURE 8. Circuit for Measuring Differential
Propagation Delays (See Figure 9)
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FIGURE 10. Circuit for Measuring Complementary
Skew (See Figure 11)
Waveforms for Circuit 4
Waveforms for Circuit 3
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FIGURE 9. Propagation Delay Waveforms
for Circuit 3 (See Figure 8)
For differential propagation delays, V1 should equal V2. Fur-
thermore, the crossing point of DO and DO* corresponds to
zero volts on the differential waveform (see bottom wave-
form in Figure 9). This is true whether V3 equals V4 or not.
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FIGURE 11. Waveforms for Circuit 4 (See Figure 10)
Complementary skew is calculated from single-ended propa-
gation delay measurements on complementary output sig-
nals, DO and DO*. Note, when V3 and V4 are absolute val-
ues, they are identical on DO and DO*; but vary whenever
they are relative values.
The complementary skew reveals information about the con-
tour of the rising and falling edge of the differential output
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