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TP5700A Datasheet, PDF (5/8 Pages) National Semiconductor (TI) – Telephone Speech Circuit
Connection Diagram
Dual-In-Line Package
Top View
TL H 5201 – 5
Order Number TP5700AM or TP5700AN
See NS Package M16B or N16A
Pin Descriptions
Pins 1 2 RCV0a and RCV0b
The push-pull complementary outputs of the receive amplifi-
er Dynamic transducers with a minimum impedance of 100
X can be directly driven by these outputs
Pin 3 Vb
This is the negative supply input to the device and should be
connected to the negative output of the polarity guard All
other voltages on the device are referred to this pin
Pin 4 S T
This is the output of the Sidetone cancellation signal which
requires a balance impedance of approximately 10 times
the subscriber’s line impedance to be connected from this
pin to Va (pin 13)
Pin 5 XDI
The input to the line output driver amplifier Transmit AGC is
applied in this stage
Pin 6 XPO
This is the transmit pre-amp output which is normally capac-
itively coupled to pin 5
Pin 7 MIC IN1
This is the inverting input to the transmit pre-amplifier and is
intended to be capacitively coupled to an FET-buffered
electret microphone
Pin 8 DTMF IN
The DTMF input which has an internal resistor to Vb to
provide the emitter load resistor for a CMOS DTMF genera-
tor This input is only active when MUTE IN (pin 9) is pulled
high
Pin 9 MUTE IN
The MUTE Input which must be pulled at least 1 5V higher
than Vb to mute MIC IN and enable DTMF IN
Pin 10 VREG1
The regulated output for biasing a pulse dialer or DTMF
generator A 4 7 mF decoupling capacitor to Vb should be
fitted if this output is used
Pin 11 VREG2
A 1 2V regulated output suitable for powering a low-voltage
electret microphone A 1mF decoupling capacitor to Vb
should be fitted if this output is used
Pin 12 RCV IN
The receive AGC amplifier input
Pin 13 Va
This is the positive supply input to the device and should be
connected to the positive output of the polarity guard The
current through this pin is modulated by the transmit signal
Pin 14 RDC
An external 1W resistor is required from this pin to Vb to
control the DC input impedance of the circuit The nominal
value is 56X for low voltage operation Values up to 82X
may be used to increase the available transmit output volt-
age swing at the expense of low voltage operation
Pin 15 VBIAS
This internal voltage bias line must be connected to Va via
an external resistor Ro and decoupled to Vb with a 22 mF
capacitor Ro dominates the AC input impedance of the cir-
cuit and should be 620X for a 600X input impedance or
910X for a 900X input impedance
Pin 16 RAGC
The range of transmit and receive gain variations between
short and long loops may be adjusted by connecting a resis-
tor from this pin to Vb (pin 3) Figure 3 shows the relation-
ship between the resistor value and the AGC range This pin
may be left open-circuit to defeat AGC action
FIGURE 3
TL H 5201 – 7
5