LP3876-ADJ Datasheet, PDF(5/14 Page) National Semiconductor (TI) – 3A Fast Ultra Low Dropout Linear Regulator

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LP3876-ADJ Datasheet, PDF (5/14 Pages) National Semiconductor (TI) – 3A Fast Ultra Low Dropout Linear Regulator

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Electrical Characteristics

LP3876-ADJ (Continued)

Limits in standard typeface are for TJ = 25ËC, and limits in boldface type apply over the full operating temperature range.

Unless otherwise specified: VIN = VO(NOM) + 1.5V, IL = 10 mA, COUT = 10ÂµF, VSD = 2V.

Symbol

Parameter

Conditions

Typ

(Note 4)

LP3876-ADJ (Note 5)

Min

Max

Units

SHUTDOWN INPUT

VSDT

Shutdown Threshold

Output = High

Output = Low

VIN

0.3

TdOFF

Turn-off delay

IL = 3A

Âµs

TdON

Turn-on delay

IL = 3A

Âµs

ISD

SD Input Current

VSD = VIN

AC PARAMETERS

VIN = VOUT + 1V

COUT = 10uF

PSRR

Ripple Rejection

VOUT = 3.3V, f = 120Hz

VIN = VOUT + 0.5V

COUT = 10uF

VOUT = 3.3V, f = 120Hz

Ïn(l/f

Output Noise Density

f = 120Hz

0.8

ÂµV

BW = 10Hz â 100kHz

150

Output Noise Voltage

VOUT = 2.5V

BW = 300Hz â 300kHz

100

ÂµV (rms)

VOUT = 2.5V

Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is

intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and test conditions, see Electrical Characteristics. The

guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed

test conditions.

Note 2: At elevated temperatures, devices must be derated based on package thermal resistance. The devices in TO220 package must be derated at Î¸jA = 50ËC/W

(with 0.5in2, 1oz. copper area), junction-to-ambient (with no heat sink). The devices in the TO263 surface-mount package must be derated at Î¸jA = 60ËC/W (with

0.5in2, 1oz. copper area), junction-to-ambient. See Application Hints.

Note 3: The human body model is a 100pF capacitor discharged through a 1.5kâ¦ resistor into each pin.

Note 4: Typical numbers are at 25ËC and represent the most likely parametric norm.

Note 5: Limits are guaranteed by testing, design, or statistical correlation.

Note 6: If used in a dual-supply system where the regulator load is returned to a negative supply, the output must be diode-clamped to ground.

Note 7: The output PMOS structure contains a diode between the VIN and VOUT terminals. This diode is normally reverse biased. This diode will get forward biased

if the voltage at the output terminal is forced to be higher than the voltage at the input terminal. This diode can typically withstand 200mA of DC current and 1Amp

of peak current.

Note 8: Output voltage line regulation is defined as the change in output voltage from the nominal value due to change in the input line voltage. Output voltage load

regulation is defined as the change in output voltage from the nominal value due to change in load current.

Note 9: Dropout voltage is defined as the minimum input to output differential voltage at which the output drops 2% below the nominal value. Dropout voltage

specification applies only to output voltages of 2.5V and above. For output voltages below 2.5V, the drop-out voltage is nothing but the input to output differential,

since the minimum input voltage is 2.5V.

Note 10: The minimum operating value for VIN is equal to either [VOUT(NOM) + VDROPOUT] or 2.5V, whichever is greater.

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