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LMH0344_09 Datasheet, PDF (5/8 Pages) National Semiconductor (TI) – 3 Gbps HD/SD SDI Adaptive Cable Equalizer
Pin Descriptions
LLP Pin
2
3
5
6
7
MICRO-
ARRAY Ball
C1
D1
E2
E3
D3
Name
SDI
SDI
AEC+
AEC-
BYPASS
8
E4
MUTEREF
10
D5
SDO
11
C5
SDO
14
B3
MUTE
15
A2
CD
13, 16
DAP, 1, 4, 9,
12
—
A1, A3, A4, B2 VCC
B1, B4, D2, E5 VEE
A5, B5, C2, NC
C3, C4, D4, E1
Description
Serial data true input.
Serial data complement input.
AEC loop filter external capacitor (1µF) positive connection.
AEC loop filter external capacitor (1µF) negative connection.
Bypasses equalization and DC restoration when high. No equalization occurs
in this mode.
Mute reference. Sets the threshold for CD and (with CD tied to MUTE)
determines the maximum cable to be equalized before muting. MUTEREF may
be either unconnected or connected to ground for maximum equalization.
Serial data complement output.
Serial data true output.
Output mute. To disable the mute function and enable the output, MUTE must
be tied to GND or a low level signal. To force the outputs to a muted state, tie
to VCC. CD may be tied to this pin to inhibit the output when no input signal is
present. MUTE has no function in BYPASS mode.
Carrier detect. CD is high when no signal is present. CD has no function in
BYPASS mode.
Positive power supply (+3.3V).
Negative power supply (ground).
No connect.
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