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LM5035 Datasheet, PDF (5/28 Pages) National Semiconductor (TI) – PWM Controller with Integrated Half-Bridge and SyncFET Drivers
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VIN to GND
HS to GND
HB to GND
HB to HS
VCC to GND
CS, RT, DLY to GND
COMP Input Current
-0.3V to 105V
-1V to 105V
-0.3V to 118V
-0.3V to 18V
-0.3V to 16V
-0.3V to 5.5V
10mA
All other inputs to GND
ESD Rating (Note 4)
Human Body Model
Storage Temperature Range
Junction Temperature
-0.3V to 7V
2kV
-65˚C to 150˚C
150˚C
Operating Ratings (Note 1)
VIN Voltage
External Voltage Applied to VCC
Operating Junction Temperature
13V to 105V
8V to 15V
-40˚C to +125˚C
Electrical Characteristics Specifications with standard typeface are for TJ = 25˚C, and those with boldface
type apply over full Operating Junction Temperature range. VVIN = 48V, VVCC = 10V externally applied, RRT = 15.0 kΩ,
RDLY = 27.4kΩ, VUVLO = 3V, VOVP = 0V unless otherwise stated. See (Note 2) and (Note 3).
Symbol Parameter
Conditions
Startup Regulator (VCC pin)
VVCC
IVCC(LIM)
VVCCUV
VCC voltage
VCC current limit
VCC Under-voltage threshold
(VCC increasing)
IVCC = 10mA
VVCC = 7V
VIN = VCC, ∆VVCC from the regulation
setpoint
VCC decreasing
VCC – PGND
IVIN
Startup regulator current
VIN = 90V, UVLO = 0V
Supply current into VCC from
Outputs & COMP open, VVCC = 10V,
external source
Outputs Switching
Voltage Reference Regulator (REF pin)
VREF
REF Voltage
REF Voltage Regulation
REF Current Limit
IREF = 0mA
IREF = 0 to 10mA
REF = 4.5V
Under-Voltage Lock Out and shutdown (UVLO pin)
VUVLO
IUVLO
Under-voltage threshold
Hysteresis current
UVLO pin sinking
Under-voltage Shutdown Threshold UVLO voltage falling
Under-voltage Standby Enable
UVLO voltage rising
Threshold
Over-Voltage Protection (OVP pin)
VOVP
Over-Voltage threshold
IOVP
Hysteresis current
Current Sense Input (CS Pin)
OVP pin sourcing
VCS
Current Limit Threshold
CS delay to output
CS from zero to 1V. Time for HO and LO
to fall to 90% of VCC. Output load = 0
pF.
Leading edge blanking time at CS
CS sink impedance (clocked)
Internal FET sink impedance
Current Limit Restart (RES Pin)
VRES
RES Threshold
Charge source current
Discharge sink current
VRES = 1.5V
VRES = 1V
Min
7.3
20
0.2
5.5
4.85
15
1.212
19
1.212
19
0.228
2.4
16
8
Typ Max Units
7.6 7.9
V
25
mA
0.1
V
6.2 6.9
V
30 70
µA
4
6
mA
5 5.15
V
25
50
mV
20
mA
1.25 1.288 V
23 27
µA
0.3
V
0.4
V
1.25 1.288 V
23 27
µA
0.25 0.272 V
80
ns
50
ns
32 60
Ω
2.5 2.6
V
22 28
µA
12 16
µA
5
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