LM3501 Datasheet, PDF (5/18 Pages) National Semiconductor (TI) – Synchronous Step-up DC/DC Converter for White LED Applications

Electrical Characteristics (Continued)
Specifications in standard type face are for T_J = 25˚C and those in boldface type apply over the full Operating Temperature
Range (T_J = −40˚C to +125˚C). Unless otherwise specified V_IN =2.7V and specifications apply to both LM3501-16 and
LM3501-21.
Symbol
Parameter
Conditions
Min
Typ
Max
(Note 6) (Note 7) (Note 6)
Units
R_DSON
D_Limit
NMOS Switch R_DSON
PMOS Switch R_DSON
Duty Cycle Limit
(LM3501-16)
Duty Cycle Limit
(LM3501-21)
V_IN = 2.7V, I_SW = 300 mA
V_OUT = 6V, I_SW = 300 mA
FB = 0V
FB = 0V
0.43
Ω
1.3
2.3
87
%
94
F_SW
Switching Frequency
I_SD
SHDN Pin Current (Note 9)
SHDN = 5.5V
SHDN = 2.7V
0.8
1.0
1.2
MHz
1.8
4
1
2.5
µA
SHDN = GND
0.1
I_CNTRL
I_L
CNTRL Pin Current (Note 9)
Switch Leakage Current
(LM3501-16)
Switch Leakage Current
(LM3501-21)
V_CNTRL = 2.7V
V_CNTRL = 1V
V_SW = 15V
V_SW = 20V
10
20
µA
4
15
0.01
0.5
µA
0.01
2.0
UVP
Input Undervoltage Lockout
ON Threshold
OFF Threshold
2.4
2.5
2.6
V
2.3
2.4
2.5
OVP
Output Overvoltage Protection
(LM3501-16)
Output Overvoltage Protection
(LM3501-21)
ON Threshold
OFF Threshold
ON Threshold
OFF Threshold
15
15.5
16
14
14.6
15
V
20
20.5
21
19
19.5
20
I_Vout
V_OUT Leakage Current
(LM3501-16)
V_OUT Leakage Current
(LM3501-21)
V_OUT = 15V, SHDN = 1.5V
V_OUT = 20V, SHDN = 1.5V
260
400
µA
300
460
I_VL
PMOS Switch Leakage Current V_OUT = 15V, V_SW = 0V
(LM3501-16)
PMOS Switch Leakage Current V_OUT = 20V, V_SW = 0V
(LM3501-21)
0.01
3
µA
0.01
3
CNTRL
Threshold
LED power off
LED power on
75
mV
125
SHDN
SHDN low
Threshold _{SHDN High}
0.65
0.3
V
1.1
0.65
Note 1: Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to
be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: This condition applies if V_IN < V_OUT. If V_IN > V_OUT, a voltage greater than V_IN + 0.3V should not be applied to the V_OUT or V_SW pins.
Note 3: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin.
Note 4: The maximum allowable power dissipation is a function of the maximum operating junction temperature, T_J(MAX), the junction-to-ambient thermal
resistance, θ_JA, and the ambient temperature, T_A. See the Thermal Properties section for the thermal resistance. The maximum allowable power dissipation at any
ambient temperature is calculated using: P_D (MAX) = (T_J(MAX) − T_A)/θ_JA. Exceeding the maximum allowable power dissipation will cause excessive die temperature.
Note 5: Junction-to-ambient thermal resistance (θ_JA) is highly application and board-layout dependent. The 75^oC/W figure provided was measured on a 4-layer test
board conforming to JEDEC standards. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues when
designing the board layout.
Note 6: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are production
tested, guaranteed through statistical analysis or guaranteed by design. All limits at temperature extremes are guaranteed via correlation using standard Statistical
Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
Note 7: Typical numbers are at 25˚C and represent the most likely norm.
Note 8: Feedback current flows out of the pin.
Note 9: Current flows into the pin.
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