LM3205_09 Datasheet, PDF (5/18 Pages) National Semiconductor (TI) – 650mA Miniature, Adjustable, Step-Down DC-DC Converter for RF Power Amplifiers

System Characteristics The following spec table entries are guaranteed by design providing the component
values in the typical application circuit are used. These parameters are not guaranteed by production testing. Min and Max
limits apply over the full operating ambient temperature range (−30°C ≤ T_A ≤ 85°C) and over the V_IN range = 2.7V to 5.5V, T_A =
25°C, PV_IN = V_DD = EN = 3.6V, L = 3.3µH, DCR of L ≤ 100mΩ, C_IN = 10µF, 0603, 6.3V (4.7µF||4.7µF, 0603, 6.3V can be used),
C_OUT = 4.7µF, 0603, 6.3V for LM3205TL/LM3205SD unless otherwise noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
T_RESPONSE
C_CON
Time for V_OUT to rise from 0.8V V_IN = 4.2V, C_OUT = 4.7µF, L = 3.3µH,
to 3.6V
R_LOAD = 5.5Ω
Time for V_OUT to fall from 3.6V to V_IN = 4.2V, C_OUT = 4.7µF, L = 3.3µH,
0.8V
R_LOAD = 10Ω
V_CON input capacitance
V_CON = 1V,
Test frequency = 100 kHz
20
30
µs
20
30
µs
20
pF
Linearity
Linearity in control
range 0.32V to 1.44V
V_IN = 3.9V
Monotonic in nature
-3
+3
%
I_CON
Control pin input current
-10
10
µA
T_ON
Turn on time
EN = Low to High, V_IN = 4.2V, V_O = 3.6V,
(time for output to reach 3.6V _{COUT = 4.7µF, IOUT ≤ 1mA}
from Enable low to high
70
100
µs
transition)
η
Efficiency
V_IN = 3.6V, V_OUT = 0.8V, I_OUT = 90mA
83
(L = 3.3µH, DCR ≤ 100mΩ)
V_IN = 4.2V, V_OUT = 3.4V, I_OUT = 400mA
96
V_OUT_ripple Ripple voltage, PWM mode
V_IN = 3V to 4.5V, V_OUT = 0.8V, I_OUT =
10
10mA to 400mA (Note 12)
%
%
mVp-p
Line_tr
Line transient response
V_IN = 600mV perturbance,
T_RISE = T_FALL = 10µs, V_OUT = 0.8V, I_OUT =
50
100mA
mVpk
Load_tr
Load transient response
V_IN = 3.1/3.6/4.5V, V_OUT = 0.8V, transients
up to 100mA, T_RISE = T_FALL = 10µs
50
PSRR
V_IN = 3.6V, V_OUT = 0.8V, I_OUT = sine wave perturbation
100mA
frequency = 10kHz, amplitude = 100mVp-
40
p
mVpk
dB
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation
of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions,
see the Electrical Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pins. The LM3205 is designed for mobile phone applications where turn-on after power-up is
controlled by the system controller and where requirements for a small package size overrule increased die size for internal Under Voltage Lock-Out (UVLO)
circuitry. Thus, it should be kept in shutdown by holding the EN pin low until the input voltage exceeds 2.7V.
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T_J = 150°C (typ.) and disengages at T_J
= 130°C (typ.).
Note 4: The Human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. (MIL-STD-883 3015.7) The machine model is a 200pF
capacitor discharged directly into each pin.
Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be de-
rated. Maximum ambient temperature (T_A-MAX) is dependent on the maximum operating junction temperature (T_J-MAX-OP = 125°C), the maximum power dissipation
of the device in the application (P_D-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θ_JA), as given by the following
equation: T_A-MAX = T_J-MAX-OP – (θ_JA × P_D-MAX).
Note 6: microSMD:Junction-to-ambient thermal resistance (θ_JA) is taken from thermal measurements, performed under the conditions and guidelines set forth
in the JEDEC standard JESD51-7. A 4 layer, 4" x 4", 2/1/1/2 oz. Cu board as per JEDEC standards is used for the measurements.
LLP: The value of (θ_JA) in LLP-10 could fall in a range of 50°C/W to 150°C/W (if not wider), depending on PWB material, layout, and environmental conditions.
In applications where high maximum power dissipation exits (high V_IN , high I_OUT ), special care must be paid to thermal dissipation areas. For more information
on these topics for LLP, refer to Application Note 1187: Leadless Leadframe Package (LLP) and the Power Efficiency and Power Dissipation section of
this datasheet
Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Due to the pulsed nature of the testing T_A = T_J for the electrical characteristics table.
Note 8: The parameters in the electrical characteristics table are tested under open loop conditions at PV_IN = V_DD = 3.6V. For performance over the input voltage
range and closed loop results refer to the datasheet curves.
Note 9: Shutdown current includes leakage current of PFET.
Note 10: I_Q specified here is when the part is operating at 100% duty cycle.
Note 11: Current limit is built-in, fixed, and not adjustable. Refer to datasheet curves for closed loop data and its variation with regards to supply voltage and
temperature. Electrical Characteristic table reflects open loop data (FB = 0V and current drawn from SW pin ramped up until cycle by cycle limit is activated).
Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current until output voltage drops by 10%.
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