DS90C385A Datasheet, PDF (5/13 Pages) National Semiconductor (TI) – +3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display Link-87.5 MHz

Transmitter Switching Characteristics (Continued)
Over recommended operating supply and temperature ranges unless otherwise specified
Symbol
Parameter
Min
Typ
Max
Units
SSCG
Spread Spectrum Clock support; Modulation
f = 25 MHz
100kHz ±
frequency with a linear profile.(Note 6)
2.5%/−5%
f = 40 MHz
100kHz ±
2.5%/−5%
f = 65 MHz
100kHz ±
2.5%/−5%
f = 87.5 MHz
100kHz ±
2.5%/−5%
TPLLS
Transmitter Phase Lock Loop Set (Figure 9)
10
ms
TPDD
Transmitter Power Down Delay (Figure 11)
100
ns
Note 5: The Minimum and Maximum Limits are based on statistical analysis of the device performance over process, voltage, and temperature ranges. This
parameter is functionality tested only on Automatic Test Equipment (ATE).
Note 6: Care must be taken to ensure TSTC and THTC are met so input data are sampling correctly. This SSCG parameter only shows the performance of tracking
Spread Spectrum Clock applied to TxCLK IN pin, and reflects the result on TxCLKOUT+ and TxCLKOUT− pins.
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