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DS90C032_07 Datasheet, PDF (5/12 Pages) National Semiconductor (TI) – LVDS Quad CMOS Differential Line Receiver
Parameter Measurement Information
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FIGURE 1. Receiver Propagation Delay and Transition Time Test Circuit
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FIGURE 2. Receiver Propagation Delay and Transition Time Waveforms
CL includes load and test jig capacitance.
S1 = VCC for tPZL and tPLZ measurements.
S1 = GND for tPZH and tPHZ measurements.
FIGURE 3. Receiver TRI-STATE Delay Test Circuit
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