DS78LS120 Datasheet, PDF (5/9 Pages) National Semiconductor (TI) – Dual Differential Line Receiver (Noise Filtering and Fail-Safe)

Application Hints (Continued)
FIGURE 2.
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TRANSMISSION LINE TERMINATION
On a transmission line which is electrically long, it is advis-
able to terminate the line in its characteristic impedance to
prevent signal reflection and its associated noise/cross-talk.
A 180Ω termination resistor is provided in the DS78LS120
line receiver. To use the termination resistor, connect pins 2
and 3 together and pins 13 and 14 together. The 180Ω
resistor provides a good compromise between line reflec-
tions, power dissipation in the driver, and IR drop in the
transmission line. If power dissipation and IR drop are still a
concern, a capacitor may be connected in series with the
resistor to minimize power loss.
The value of the capacitor is recommended to be the line
length (time) divided by 3 times the resistor value. Example:
if the transmission line is 1,000 feet long, (approximately
1000 ns), and the termination resistor value is 180Ω, the
capacitor value should be 1852 pF. For additional application
details, refer to application notes AN-22 and AN-108.
mode if the transmission line is open or shorted. To facilitate
the detection of input opens or shorts, the DS78LS120 in-
corporates an input threshold voltage offset. This feature will
force the line receiver to a specific logic state if presence of
either fault is a condition.
Given that the receiver input threshold is ±200 mV, an input
signal greater than ±200 mV insures the receiver will be in a
specific logic state. When the offset control input (pins 1 and
15) is connected to V_CC = 5V, the input thresholds are offset
from 200 mV to 700 mV, referred to the non-inverting input,
or −200 mV to −700 mV, referred to the inverting input.
Therefore, if the input is open or shorted, the input will be
greater than the input threshold and the receiver will remain
in a specified logic state.
The input circuit of the receiver consists of a 5k resistor
terminated to ground through 120Ω on both inputs. This
network acts as an attenuator, and permits operation with
common-mode input voltages greater than ±15V. The offset
control input is actually another input to the attenuator, but its
resistor value is 56k. The offset control input is connected to
the inverting input side of the attenuator, and the input
voltage to the amplifier is the sum of the inverting input plus
0.09 times the voltage on the offset control input. When the
offset control input is connected to 5V the input amplifier will
see V_{IN(INVERTING)} +0.45V or V_{IN(INVERTING)} +0.9V when the
control input is connected to 10V. The offset control input will
not significantly affect the differential performance of the
receiver over its common-mode operating range, and will not
change the input impedance balance of the receiver.
It is recommended that the receiver be terminated (500Ω or
less) to insure it will detect an open circuit in the presence of
noise.
The offset control can be used to insure fail-safe operation
for unbalanced interface (RS-423) or for balanced interface
(RS-422) operation.
For unbalanced operation, the receiver would be in an inde-
terminate logic state if the offset control input was open.
Connecting the fail-safe offset pin to 5V, offsets the receiver
threshold to 0.45V. The output is forced to a logic zero state
if the input is open or shorted.
FAIL-SAFE OPERATION
Communication systems require elements of a system to
detect the presence of signals in the transmission lines, and
it is desirable to have the system shut-down in a fail-safe
Unbalanced RS-423 and RS-232 Fail-Safe
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