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DS75325 Datasheet, PDF (5/14 Pages) National Semiconductor (TI) – Memory Drivers
DC Test Circuits (Continued)
Note 1 Figure 3 and 4 parameters must be measured using pulse techniques tW e 200 ms duty cycle s2%
Test Table
C
D
S2
Y
Z
0 8V 4 5V 0 8V
RL
OPEN
4 5V 0 8V 0 8V OPEN
RL
FIGURE 4 VIL and Sink VSAT
TL F 9755 – 6
5