DS15BA101_07 Datasheet, PDF (5/10 Pages) National Semiconductor (TI) – 1.5 Gbps Differential Buffer with Adjustable Output Voltage

OUTPUT INTERFACING
The DS15BA101 uses current mode outputs. Single-ended
output levels are 400 mV_P-P into AC-coupled 100Ω differential
cable (with R_VO = 953Ω) or into AC-coupled 50Ω coaxial cable
(with R_VO = 487Ω). Output level is controlled by the value of
the R_VO resistor connected between the R_VO and V_CC.
The R_VO resistor should be placed as close as possible to the
R_VO pin. In addition, the copper in the plane layers below the
R_VO network should be removed to minimize parasitic capac-
itance. The following figure illustrates typical DC-coupled in-
terface to common differential receivers and assumes that the
receivers have high impedance inputs. While most receivers
have a common mode input range that can accomodate CML
signals, it is recommended to check respective receiver's
datasheet prior to implementing the suggested interface im-
plementation.
20199923
Typical DS15BA101 Output DC-Coupled Interface to an LVDS, CML or LVPECL Receiver
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