CD4528BM Datasheet, PDF (5/8 Pages) National Semiconductor (TI) – Dual Monostable Multivibrator

Logic Diagrams ( of Device Shown)
Note Externally ground pins 1 and 15 to pin 8
TL F 5998 – 3
Duty Cycle e 50%
TL F 5998 – 10
TL F 5998 – 4
FIGURE 1 Power Dissipation Test Circuit and Waveforms
Input Connections
Characteristics
t_PLH t_PHL t_r t_f
PW_out PW_in
t_PLH t_PHL t_r t_f
PW_out PW_in
t_PLH(R) t_PHL(R) PW_in
C_D
V_DD
V_DD
PG3
A
PG1
V_SS
PG1
B
V_DD
PG2
PG2
TL F 5998 – 5
Includes capacitance of probes wir-
ing and fixture parasitic
Note AC test waveforms for PG1
PG2 and PG3 on next page
FIGURE 2 AC Test Circuit
TL F 5998 – 6
5