ADC082S101 Datasheet, PDF (5/19 Pages) National Semiconductor (TI) – 2 Channel, 1 MSPS, 8-Bit A/D Converter

ADC082S101 Timing Specifications
The following specifications apply for V_A = +2.7V to 5.25V, GND = 0V, f_SCLK = 8 MHz to 16 MHz, f_SAMPLE = 500 kSPS to 1
MSPS, C_L = 50 pF, Boldface limits apply for T_A = T_MIN to T_MAX: all other limits T_A = 25˚C.
Symbol
Parameter
Conditions
Typical
Limits
(Note 7)
Units
t_CSU
t_CLH
t_EN
t_ACC
t_SU
t_H
t_CH
t_CL
t_DIS
Setup Time SCLK High to CS Falling Edge
Hold time SCLK Low to CS Falling Edge
Delay from CS Until DOUT active
Data Access Time after SCLK Falling Edge
Data Setup Time Prior to SCLK Rising Edge
Data Valid SCLK Hold Time
SCLK High Pulse Width
SCLK Low Pulse Width
CS Rising Edge to DOUT High-Impedance
(Note 10)
(Note 10)
V_A = +3.0V
V_A = +5.0V
V_A = +3.0V
V_A = +5.0V
V_A = +3.0V
V_A = +5.0V
V_A = +3.0V
V_A = +5.0V
Output Falling
Output Rising
V_A = +3.0V
V_A = +5.0V
V_A = +3.0V
V_A = +5.0V
−3.5
−0.5
+4.5
+1.5
+4
+2
+16.5
+15
+3
+3
0.5 x
t_SCLK
0.5 x
t_SCLK
1.7
1.2
1.0
1.0
10
ns (min)
10
30
30
10
10
0.3 x
t_SCLK
0.3 x
t_SCLK
ns (min)
ns
(max)
ns
(max)
ns (min)
ns (min)
ns (min)
ns (min)
ns
20
(max)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND = 0V, unless otherwise specified.
Note 3: When the input voltage at any pin exceeds the power supply (that is, V_IN < GND or V_IN > V_A), the current at that pin should be limited to 10 mA. The 20
mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to two. The Absolute
Maximum Rating specification does not apply to the V_A pin. The current into the V_A pin is limited by the Analog Supply Voltage specification.
Note 4: The absolute maximum junction temperature (T_Jmax) for this device is 150˚C. The maximum allowable power dissipation is dictated by T_Jmax, the
junction-to-ambient thermal resistance (θ_JA), and the ambient temperature (T_A), and can be calculated using the formula P_DMAX = (T_Jmax − T_A)/θ_JA. The values
for maximum power dissipation listed above will be reached only when the device is operated in a severe fault condition (e.g. when input or output pins are driven
beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 kΩ resistor. Machine model is 220 pF discharged through zero ohms.
Note 6: Reflow temperature profiles are different for lead-free and non-lead-free packages.
Note 7: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: This is the frequency range over which the electrical performance is guaranteed. The device is functional over a wider range which is specified under
Operating Ratings.
Note 9: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 10: Clock may be in any state (high or low) when CS is asserted, with the restrictions on setup and hold time given by t_CSU and t_CLH.
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