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| NMC27C32B Datasheet, PDF (4/10 Pages) Fairchild Semiconductor – 32,768-Bit (4096 x 8) CMOS EPROM | |||
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Capacitance TA e a25 C f e 1 MHz (Note 2)
Symbol
Parameter
Conditions Typ Max Units
CIN1
Input Capacitance except OE VPP VIN e 0V
6 12 pF
CIN2
OE VPP Input Capacitance
VIN e 0V 16 20 pF
COUT Output Capacitance
VOUT e 0V 9 12 pF
AC Test Conditions
Output Load
Input Rise and Fall Times
Input Pulse Levels
1 TTL Gate and
CL e 100 pF (Note 8)
s5 ns
0 45V to 2 4V
AC Waveforms (Note 7)
Timing Measurement Reference Level
Inputs
Outputs
0 8V and 2V
0 8V and 2V
TL D 8827 â 3
Note 1 Stresses above those listed under ââAbsolute Maximum Ratingsââ may cause permanent damage to the device This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied Exposure to absolute
maximum rating conditions for extended periods may affect device reliability
Note 2 This parameter is only sampled and is not 100% tested
Note 3 OE may be delayed up to tACC b tOE after the falling edge of CE without impacting tACC
Note 4 The tDF and tCF compare level is determined as follows
High to TRI-STATE the measured VOH1 (DC) b 0 10V
Low to TRI-STATE the measured VOL1 (DC) a 0 10V
Note 5 TRI-STATE may be attained using OE or CE
Note 6 The power switching characteristics of EPROMs require careful device decoupling It is recommended that at least a 0 1 mF ceramic capacitor be used on
every device between VCC and GND
Note 7 The outputs must be restricted to VCC a 1 0V to avoid latch-up and device damage
Note 8 1 TTL Gate IOL e 1 6 mA IOH e b400 mA
CL 100 pF includes fixture capacitance
Note 9 Inputs and outputs can undershoot to b2 0V for 20 ns Max except for OE VPP which cannot exceed b0 2V
Note 10 Typical values are for TA e 25 C and nominal supply voltages
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