LP38692-ADJ Datasheet, PDF(4/13 Page) National Semiconductor (TI) – 1A Low Dropout CMOS Linear Regulators with Adjustable Output Stable with Ceramic Output Capacitors

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LP38692-ADJ Datasheet, PDF (4/13 Pages) National Semiconductor (TI) – 1A Low Dropout CMOS Linear Regulators with Adjustable Output Stable with Ceramic Output Capacitors

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Electrical Characteristics Limits in standard typeface are for TJ = 25ËC, and limits in boldface type apply

over the full operating temperature range. Unless otherwise specified: VIN = VOUT + 1V, CIN = COUT = 10 ÂµF, ILOAD = 10mA.

Min/Max limits are guaranteed through testing, statistical correlation, or design. (Continued)

Symbol

Parameter

Output Noise

VO (LEAK)

VEN

Output Leakage Current

Enable Voltage (LP38692-ADJ

Only)

IEN

Enable Pin Leakage

(LP38692-ADJ Only)

Conditions

BW = 10Hz to 10kHz

VO = 3.3V

VO = VO(NOM) + 1V @ 10VIN

Output = OFF

Output = ON, VIN = 4V

Output = ON, VIN = 6V

Output = ON, VIN = 10V

VEN = 0V or 10V, VIN = 10V

Typ

Min

Max

(Note 4)

0.7

0.5

0.4

1.8

3.0

4.0

-1

0.001

Units

ÂµV/

ÂµA

Note 1: Absolute maximum ratings indicate limits beyond which damage to the component may occur. Operating ratings indicate conditions for which the device

is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications, see Electrical Characteristics. Specifications do not

apply when operating the device outside of its rated operating conditions.

Note 2: At elevated temperatures, device power dissipation must be derated based on package thermal resistance and heatsink values (if a heatsink is used). The

junction-to-ambient thermal resistance (Î¸J-A) for the SOT-223 is approximately 125 ËC/W for a PC board mounting with the device soldered down to minimum copper

area (less than 0.1 square inch). If one square inch of copper is used as a heat dissipator for the SOT-223, the Î¸J-A drops to approximately 70 ËC/W. The Î¸J-A values

for the LLP package are also dependent on trace area, copper thickness, and the number of thermal vias used (refer to application note AN-1187). If power disspation

causes the junction temperature to exceed specified limits, the device will go into thermal shutdown.

Note 3: ESD is tested using the human body model which is a 100pF capacitor discharged through a 1.5k resistor into each pin.

Note 4: Typical numbers represent the most likely parametric norm for 25ËC operation.

Note 5: If used in a dual-supply system where the regulator load is returned to a negative supply, the output pin must be diode clamped to ground.

Note 6: Output voltage line regulation is defined as the change in output voltage from nominal value resulting from a change in input voltage.

Note 7: Output voltage load regulation is defined as the change in output voltage from nominal value as the load current increases from 1mA to full load.

Note 8: Dropout voltage is defined as the minimum input to output differential required to maintain the output within 100mV of nominal value.

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