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LMC7111_14 Datasheet, PDF (4/26 Pages) National Semiconductor (TI) – LMC7111 Tiny CMOS Operational Amplifier with Rail-to-Rail Input and Output
LMC7111
SNOS753E – AUGUST 1999 – REVISED MARCH 2013
www.ti.com
3.3V DC Electrical Characteristics
Unless otherwise specified, all limits specified for TJ = 25°C, V+ = 3.3V, V− = 0V, VCM = VO = V+/2 and RL > 1 MΩ. Boldface
limits apply at the temperature extremes.
Symbol
Parameter
VCM
Input Common-Mode
Voltage Range
Conditions
V+ = 3.3V
For CMRR ≥ 50 dB
Typ (1)
−0.25
LMC7111AI
Limit (2)
−0.1
0.00
LMC7111BI
Limit (2)
−0.1
0.00
Units
V
min
3.5
3.4
3.4
V
3.2
3.2
max
(1) Typical Values represent the most likely parametric norm.
(2) All limits are specified by testing or statistical analysis.
5V DC Electrical Characteristics
Unless otherwise specified, all limits specified for TJ = 25°C, V+ = 5V, V− = 0V, VCM = VO = V+/2 and RL > 1 MΩ. Boldface
limits apply at the temperature extremes.
Symbol
Parameter
VOS
Input Offset Voltage
Conditions
V+ = 5V
Typ (1)
0.9
LMC7111AI
Limit (2)
LMC7111BI
Limit (2)
Units
mV
max
TCVOS
IB
IOS
Input Offset Voltage
Average Drift
Input Bias Current
Input Offset Current
See (3)
See (3)
2.0
0.1
1
20
0.01
0.5
10
μV/°C
1
pA
20
max
0.5
pA
10
max
RIN
CMRR
+PSRR
−PSRR
VCM
Input Resistance
Common Mode
Rejection Ratio
Positive Power Supply
Rejection Ratio
Negative Power Supply
Rejection Ratio
Input Common-Mode
Voltage Range
0V ≤ VCM ≤ 5V
5V ≤ V+ ≤10V,
V− = 0V, VO = 2.5V
−5V ≤ V− ≤−10V,
V− = 0V, VO = −2.5V
V+ = 5V
For CMRR ≥ 50 dB
>10
85
85
85
−0.3
70
70
70
−0.20
0.00
60
60
60
−0.20
0.00
Tera Ω
dB
min
dB
min
dB
min
V
min
5.25
5.20
5.20
V
5.00
5.00
max
CIN
Common-Mode Input
Capacitance
VO
Output Swing
V+ = 5V
RL = 100 kΩ
V+ = 5V
RL = 10 kΩ
3
pF
4.99
4.98
4.98
Vmin
0.01
0.02
0.02
Vmax
4.98
4.9
4.9
Vmin
0.02
0.1
0.1
Vmin
ISC
Output Short Circuit Current Sourcing, VO = 0V
7
5
5
mA
3.5
3.5
min
Sinking, VO = 3V
7
5
5
mA
3.5
3.5
min
AVOL
Voltage Gain
Sourcing
500
V/mv
min
Sinking
200
IS
Supply Current
V+ = +5V,
25
VO = V+/2
V/mv
min
μA
max
(1) Typical Values represent the most likely parametric norm.
(2) All limits are specified by testing or statistical analysis.
(3) Bias Current specified by design and processing.
4
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