DS75107 Datasheet, PDF (4/9 Pages) National Semiconductor (TI) – Dual Line Receiver

Typical Applications
Data-Bus or Party-Line System
Data-Bus or Party-Line System
DS009446-2
APPLICATION
The DS75107 dual line circuit is designed specifically for use
in high speed data transmission systems that utilize bal-
anced, terminated transmission lines such as twisted-pair
lines. The system operates in the balanced mode, so that
noise induced on one line is also induced on the other. The
noise appears common mode at the receiver input terminals
where it is rejected. The ground connection between the line
driver and receiver is not part of the signal circuit so that sys-
tem performance is not affected by circulating ground cur-
rents.
The unique driver output circuit allows terminated transmis-
sion lines to be driven at normal line impedances. High
speed system operation is ensured since line reflections are
virtually eliminated when terminated lines are used.
Cross-talk is minimized by low signal amplitudes and low line
impedances.
DS009446-3
The typical data delay in a system is approximately (30 +
1.3L) ns, where L is the distance in feet separating the driver
and receiver. This delay includes one gate delay in both the
driver and receiver.
Data is impressed on the balanced-line system by unbalanc-
ing the line voltages with the driver output current. The
driven line is selected by appropriate driver input logic levels.
The voltage difference is approximately:
V_DIFF ≅ ¹â„2 I_O(on) x R_T: (1)
High series line resistance will cause degradation of the sig-
nal. The receivers, however, will detect signals as low as
25 mV(or less). For normal line resistances, data may be re-
covered from lines of several thousand feet in length.
Line termination resistors (R_T) are required only at the ex-
treme ends of the line. For short lines, termination resistors
at the receiver only may prove adequate. The signal ampli-
tude will then be approximately:
V_DIFF ≅ I_O(on) x R_T: (2)
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