DS64EV100 Datasheet, PDF (4/10 Pages) National Semiconductor (TI) – Programmable Single Equalizer

Symbol
Parameter
Conditions
R_LI
Differential Input
100 MHz – 1.6 GHz, with fixture’s effect de-
Return Loss
embedded
R_IN
Differential Input
Differential Across IN+ and IN-
Return Loss
CML OUTPUTS (OUT+, OUT−)
V_O
Output Voltage Swing Differential measurement with OUT+ and OUT-
terminated by 50Ω to GND AC-Coupled (Figure
2)
V_OCM
Output Common-
Mode Voltage
Single-ended measurement DC-Coupled with
50Ω terminations
(Note 7)
t_R, t_F
Transition Time
20% to 80% of differential output voltage,
measured within 1” from output pins. (Figure 2)
(Note 7)
R_O
Output Resistance Single-ended to V_DD
R_LO
Differential Output 100 MHz–3.2 GHz, with fixture’s effect de-
Return Loss
embedded. IN+ = static high.
t_PLHD
Differential Low to
High Propagation
Delay
Propagation delay measurement at 50% VO
between input to output, 100 Mbps (Figure 3)
(Note 7)
t_PHLD
Differential High to
Low Propagation
Delay
EQUALIZATION
DJ1
Residual
30” of 6 mil microstrip FR4, EQ Setting 0x06,
Deterministic Jitter at PRBS-7 (2⁷ – 1) pattern (Note 6)
10 Gbps
DJ2
Residual
40” of 6 mil microstrip FR4, EQ Setting 0x06,
Deterministic Jitter at PRBS-7 (2⁷ – 1) pattern (Note 5,6)
6.4 Gbps
DJ3
Residual
40” of 6 mil microstrip FR4, EQ Setting 0x07,
Deterministic Jitter at PRBS-7 (2⁷ – 1) pattern (Note 5,6)
5 Gbps
DJ4
Residual
40” of 6 mil microstrip FR4, EQ Setting 0x07,
Deterministic Jitter at PRBS-7 (2⁷ – 1) pattern (Note 5,6)
2.5 Gbps
RJ
Random Jitter
(Note 7,8)
Min
85
500
V_DD-0.2
20
42
Typ
Max
Units
10
dB
100
115
Ω
725
mV_P-P
V_DD-0.1
V
45
ps
50
58
Ω
10
dB
240
ps
240
ps
0.20
0.17
0.12
0.10
0.5
0.26
0.20
0.16
UI_P-P
UI_P-P
UI_P-P
UI_P-P
ps_rms
Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the
device should not be operated beyond such conditions. Absolute Maximum Numbers are guaranteed for a junction temperature range of –40°C to +125°C. Models
are validated to Maximum Operating Voltages only.
Note 2: Typical values represent most likely parametric norms at V_DD = 3.3V or 2.5V, T_A = 25°C., and at the Recommended Operation Conditions at the time of
product characterization and are not guaranteed.
Note 3: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified
or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.
Note 4: Allowed supply noise (mV_P-P sine wave) under typical conditions.
Note 5: Specification is guaranteed by characterization at optimal boost setting and is not tested in production.
Note 6: Deterministic jitter is measured at the differential outputs (point C of Figure 1), minus the deterministic jitter before the test channel (point A of Figure 1).
Random jitter is removed through the use of averaging or similar means.
Note 7: Measured with clock-like {11111 00000} pattern.
Note 8: Random jitter contributed by the equalizer is defined as sqrt (J_OUT2 – J_IN2). J_OUT is the random jitter at equalizer outputs in ps_rms, see point C of Figure 1;
J_IN is the random jitter at the input of the equalizer in ps_rms, see point B of Figure 1.
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