CD4029BC Datasheet, PDF (4/8 Pages) Fairchild Semiconductor – Presettable Binary/Decade Up/Down Counter

AC Electrical Characteristics
T_A e 25 C C_L e 50 pF R_L e 200 k Input t_rCL e t_fCL e 20 ns unless otherwise specified (Continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
PRESET ENABLE OPERATION
t_PHL or t_PLH
Propagation Delay Time
to Q output
t_PHL or t_PLH
Propagation Delay Time
to Carry Output
t_WH
Minimum Preset Enable
Pulse Width
t_REM
Minimum Preset Enable
Removal Time
CARRY INPUT OPERATION
V_DD e 5V
V_DD e 10V
V_DD e 15V
V_DD e 5V
V_DD e 10V
V_DD e 15V
V_DD e 5V
V_DD e 10V
V_DD e 15V
V_DD e 5V
V_DD e 10V
V_DD e 15V
285
570
ns
115
230
ns
95
195
ns
400
800
ns
165
330
ns
135
260
ns
80
160
ns
30
60
ns
25
50
ns
150
300
ns
60
120
ns
50
100
ns
t_PHL or t_PLH
Propagation Delay Time
to Carry Output
V_DD e 5V
V_DD e 10V
V_DD e 15V
265
530
ns
110
220
ns
90
180
ns
t_PHL t_PLH
Propagation Delay Time
to Carry Output
C_L e 15 pF
V_DD e 5V
V_DD e 10V
V_DD e 15V
200
400
ns
85
170
ns
70
140
ns
AC Parameters are guaranteed by DC correlated testing
Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation
Note 2 V_SS e 0V unless otherwise specified
Note 3 I_OH and I_OL are tested one output at a time
Note 4 C_PD determines the no load AC power consumption of any CMOS device For complete explanation see 54C 74C Family Characteristics application note
AN-90
Connection Diagram
Dual-In-Line Package
Order Number CD4029B
Top View
TL F 5960–2
4