PCM16C010 Datasheet, PDF (36/38 Pages) National Semiconductor (TI) – Configurable PC Card Interface Chip

Timing Specifications and Diagrams (Continued)
NAND Flash (NM29N16) Write Timing Specification (See Figure 8 )
Symbol
Path
Commercial
V_CC
(V)
T_A e 0 C to a70 C
Min
Max
tsu HDATA(IOWR)
HDATA Setup Time to HIOWR Falling
4 75
60
30
60
tsu HDATA(HWE)
HDATA Setup Time to HWE Rising
4 75
40
30
40
th(IOWR)
HDATA Hold from HIOWR Rising
4 75
30
30
30
th HDATA(HWE)
HDATA Hold Time from HWE Rising
4 75
30
30
30
td WE(IOWR)
WE Delay from HIOWR
4 75
18
30
25
td WE(HWE)
WE Delay from HWE
4 75
12
30
16
td CE NAND(3 0)
CE NAND(3 0) Delay from HIOWR
4 75
27
(IOWR)
30
32
td ALE CLE(IOWR)
ALE CLE Delay from HIOWR
4 75
22
30
27
tw (IOWR)
HIOWR Pulse Width
4 75
165
30
165
tw (HWE)
HWE Pulse Width
4 75
60
30
60
td(LDATA)
LDATA Delay from HDATA
4 75
15
30
15
Parameter guaranteed by design
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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