ADC08D1500_09 Datasheet, PDF (31/40 Pages) National Semiconductor (TI) – High Performance, Low Power, Dual 8-Bit, 1.5 GSPS A/D Converter

mode voltage should track the V_CMO output pin. Note that the
V_CMO output potential will change with temperature. The com-
mon mode output of the driving device should track this
change.
IMPORTANT NOTE: An analog input channel that is not used
(e.g. in DES Mode) should be tied to the V_CMO voltage when
the inputs are d.c. coupled. Do not connect unused analog
inputs to ground.
Full-scale distortion performance falls off rapidly as the
input common mode voltage deviates from V_CMO. This is
a direct result of using a very low supply voltage to min-
imize power. Keep the input common voltage within 50
mV of V_CMO.
Performance of the ADC08D1500 is as good in the d.c.
coupled mode as it is in the a.c. coupled mode, provided
the input common mode voltage at both analog inputs
remain within 50 mV of V_CMO.
2.2.1 Handling Single-Ended Input Signals
There is no provision for the ADC08D1500 to adequately pro-
cess single-ended input signals. The best way to handle
single-ended signals is to convert them to differential signals
before presenting them to the ADC. The easiest way to ac-
complish single-ended to differential signal conversion is with
an appropriate balun-connected transformer, as shown in
Figure 12.
2.2.1.1 A.C. Coupled Input
The easiest way to accomplish single-ended a.c. input to dif-
ferential a.c. signal is with an appropriate balun-connected
transformer, as shown in Figure 12.
and insertion loss of the balun should also be considered. The
VSWR aids in determining the overall transmission line ter-
mination capability of the balun when interfacing to the ADC
input. The insertion loss should be considered so that the sig-
nal at the balun output is within the specified input range of
the ADC as described in the Converter Electrical Character-
istics as the specification V_IN.
2.2.1.2 D.C. Coupled Input
When d.c. coupling to the ADC08D1500 analog inputs is re-
quired, single-ended to differential conversion may be easily
accomplished with the LMH6555, as shown in Figure 13. In
such applications, the LMH6555 performs the task of single-
ended to differential conversion while delivering low distortion
and noise, as well as output balance, that supports the oper-
ation of the ADC08D1500. Connecting the ADC08D1500
V_CMO pin to the V_{CM_REF} pin of the LMH6555, through the ap-
propriate buffer, will ensure that the ADC08D1500 common
mode input voltage is as needed for optimum performance of
the ADC08D1500. See Figure 13. The LMV321 was chosen
as the buffer in Figure 13 for its low voltage operation and
reasonable offset voltage.
Be sure to limit output current from the ADC08D1500 V_CMO
pin to 100 μA.
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FIGURE 12. Single-Ended to Differential Signal
Conversion Using a Balun
Figure 12 is a generic depiction of a single-ended to differen-
tial signal conversion using a balun. The circuitry specific to
the balun will depend on the type of balun selected and the
overall board layout. It is recommended that the system de-
signer contact the manufacturer of the balun they have se-
lected to aid in designing the best performing single-ended to
differential conversion circuit using that particular balun.
When selecting a balun, it is important to understand the input
architecture of the ADC. There are specific balun parameters
of which the system designer should be mindful. They should
match the impedance of their analog source to the
ADC08D1500's on-chip 100 differential input termination re-
sistor. The range of this termination resistor is described in
the electrical table as the specification R_IN.
Also, as a result of the ADC architecture, the phase and am-
plitude balance are important. The lowest possible phase and
amplitude imbalance is desired when selecting a balun. The
phase imbalance should be no more than ±2.5° and the am-
plitude imbalance should be limited to less than 1dB at the
desired input frequency range. Finally, when selecting a
balun, the VSWR (Voltage Standing Wave Ratio), bandwidth
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FIGURE 13. Example of Servoing the Analog Input with
V_CMO
Figure 13, R _ADJ- and R_ADJ+ are used to adjust the differential
offset that can be measured at the ADC inputs V_IN+ / V_IN-. An
unadjusted positive offset with reference to V_IN- greater than
|15mV| should be reduced with a resistor in the R_ADJ- position.
Likewise, an unadjusted negative offset with reference to
V_IN- greater than |15mV| should be reduced with a resistor in
the R_ADJ+ position. gives suggested R_ADJ- and R_ADJ+ values
for various unadjusted differential offsets to bring the V_IN+ /
V_IN- offset back to within |15mV|.
TABLE 6. D.C. Coupled Offset Adjustment
Unadjusted Offset
Reading
Resistor Value
0mV to 10mV
no resistor needed
11mV to 30mV
20.0kΩ
31mV to 50mV
51mV to 70mV
71mV to 90mV
91mV to 110mV
10.0kΩ
6.81kΩ
4.75kΩ
3.92kΩ
31
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