MNLM2940-12-X Datasheet, PDF (3/14 Pages) National Semiconductor (TI) – 1A LOW DROPOUT REGULATOR

MNLM2940-12-X REV 1A1
MICROCIRCUIT DATA SHEET
(Absolute Maximum Ratings)
(Note 1)
Input Voltage (Survival Voltage <100ms)
Internal Power Dissipation
(Note 2, 3)
Maximum Junction Temperature
Storage Temperature Range
Lead Temperature
(Soldering, 10 seconds)
Thermal Resistance
ThetaJA
T03 Pkg
(Still Air)
T03 Pkg
(500LF/Min Air flow)
CERDIP
(Still Air)
CERDIP
(500LF/Min Air flow)
CERAMIC SOIC (Still Air)
CERAMIC SOIC (500LF/Min Air Flow)
ThetaJC
T03
CERDIP
(Note 3)
CERAMIC SOIC
(Note 3)
Package Weight
(Typcial)
T03 Pkg
CERDIP
CERAMIC SOIC
ESD Susceptibility
(Note 4)
60V
Internally Limited
150 C
-65 C to +150 C
300 C
40 C/W
TBD
73 C/W
37 C/W
122 C/W
77 C/W
5 C/W
3 C/W
5 C/W
TBD
1970mg
360mg
4000V
Note 1:
Note 2:
Note 3:
Note 4:
Absolute Maximum Ratings are limits beyond which damage to the device may occur.
Operating Ratings are conditions for which the device is functional, but do not
guaranteed specific performance limits. For guaranteed specifications and test
conditions see the Electrical Characteristics. The guaranteed specifications apply
only for the test conditions listed. Some performance characteristics may degrade
when the device is not operated under the listed test conditions.
The maximum power dissipation must be derated at elevated temperatures and is
dictated by Tjmax (maximum junction temperature), ThetaJA (package junction to
ambient thermal resistance), and TA (ambient temperature). The maximum allowable
power dissipation at any temperature is Pdmax = (Tjmax - TA)/ThetaJA or the number
given in the Absolute Maximum Ratings, whichever is lower.
The package material for these devices allows much improved heat transfer over our
standard ceramic packages. In order to take full advantage of this improved heat
transfer, heat sinking must be provided between the package base (directly beneath
the die), and either metal traces on, or thermal vias through, the printed circuit
board. Without this additional heat sinking, device power dissipation must be
calculated using junction-to-ambient, rather than junction-to-case, thermal
resistance. It must not be assumed that the device leads will provide substantial
heat transfer out of the package, since the thermal resistance of the leadframe
material is very poor, relative to the material of the package base. The stated
junction-to-case thermal resistance is for the package material only, and does not
account for the additional thermal resistance between the package base and the
printed circuit board. The user must determine the value of the additional thermal
resistance and must combine this with the stated value for the package, to calculate
the total allowed power dissipation for the device.
Human body model, 100pF discharged through 1.5K Ohms
3