DS90LV048A_01 Datasheet, PDF (3/11 Pages) National Semiconductor (TI) – 3V LVDS Quad CMOS Differential Line Receiver

Switching Characteristics (Continued)
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified. (Notes 3, 4, 7, 8)
Symbol
Parameter
Conditions
Min Typ
t_PHZ
t_PLZ
t_PZH
t_PZL
f_MAX
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
Maximum Operating Frequency (Note 14)
R_L = 2 kΩ
8
C_L = 15 pF
8
(Figure 3 and Figure 4)
9
9
All Channels Switching 200 250
Max Units
14
ns
14
ns
14
ns
14
ns
MHz
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground unless otherwise
specified.
Note 3: All typicals are given for: V_CC = +3.3V, T_A = +25˚C.
Note 4: Generator waveform for all tests unless otherwise specified: f = 1 MHz, Z_O = 50Ω, t_r and t_f (0% to 100%) ≤ 3 ns for R_IN.
Note 5: The VCMR range is reduced for larger VID. Example: if VID = 400mV, the VCMR is 0.2V to 2.2V. The fail-safe condition with inputs shorted is not supported
over the common-mode range of 0V to 2.4V, but is supported only with inputs shorted and no external common-mode voltage applied. A VID up to V_CC− 0V may
be applied to the R_IN+/ R_IN− inputs with the Common-Mode voltage set to V_CC/2. Propagation delay and Differential Pulse skew decrease when VID is increased
from 200mV to 400mV. Skew specifications apply for 200mV ≤ VID ≤ 800mV over the common-mode range .
Note 6: t_SKD1 is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel
Note 7: t_SKD2, Channel-to-Channel Skew is defined as the difference between the propagation delay of one channel and that of the others on the same chip with
any event on the inputs.
Note 8: t_SKD3, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices at the same V_CC,
and within 5˚C of each other within the operating temperature range.
Note 9: t_SKD4, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices over recommended
operating temperature and voltage ranges, and across process distribution. t_SKD4 is defined as |Max−Min| differential propagation delay.
Note 10: ESD Rating:HBM (1.5 kΩ, 100 pF) ≥ 10kV
EIAJ (0Ω, 200 pF) ≥ 1200V
Note 11: Output short circuit current (I_OS) is specified as magnitude only, minus sign indicates direction only. Only one output should be shorted at a time, do not
exceed maximum junction temperature specification.
Note 12: C_L includes probe and jig capacitance.
Note 13: V_CC is always higher than R_IN+ and R_IN− voltage. R_IN− and R_IN+ are allowed to have a voltage range −0.2V to V_CC− VID/2. However, to be compliant with
AC specifications, the common voltage range is 0.1V to 2.3V
Note 14: f_MAX generator input conditions: t_r = t_f < 1 ns (0% to 100%), 50% duty cycle, differential (1.05V to 1.35V peak to peak). Output criteria: 60/40% duty cycle,
V_OL (max 0.4V), V_OH (min 2.7V), Load = 15 pF (stray plus probes).
Parameter Measurement Information
10088803
FIGURE 1. Receiver Propagation Delay and Transition Time Test Circuit
10088804
FIGURE 2. Receiver Propagation Delay and Transition Time Waveforms
3
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