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DS1648 Datasheet, PDF (3/6 Pages) National Semiconductor (TI) – DS1648/DS3648/DS1678/DS3678 TRI-STATEÉ TTL to MOS Multiplexers/Drivers
Switching Characteristics VCC 5V TA 25 C (Note 4)
Symbol
Parameter
Conditions
tSg
Storage Delay Negative Edge
tS’
Storage Delay Positive Edge
tF
Fall Time
tR
Rise Time
tZL
Delay from Output Control Input to Logical ‘‘0’’
Level (from High Impedance State)
(Figure 1) CL 50 pF
CL 500 pF
(Figure 1) CL 50 pF
CL 500 pF
(Figure 1) CL 50 pF
CL 500 pF
(Figure 1) CL 50 pF
CL 500 pF
CL 50 pF RL 2 kX to VCC
(Figure 2)
tZH
Delay from Output Control Input to Logical ‘‘1’’
Level (from High Impedance State)
CL 50 pF RL 2 kX to GND
(Figure 2)
tLZ
Delay from Output Control Input to High Impedance CL 50 pF RL 400X to VCC
State (from Logical ‘‘0’’ Level)
(Figure 3)
tHZ
Delay from Output Control Input to High Impedance CL 50 pF RL 400X to GND
State (from Logical ‘‘1’’ Level)
(Figure 3)
tSg
Propagation Delay to Logical ‘‘0’’ Transition When
Select Selects A
CL 50 pF (Figure 1)
tS’
Propagation Delay to Logical ‘‘1’’ Transition When
Select Selects A
CL 50 pF (Figure 1)
tSg
Propagation Delay to Logical ‘‘0’’ Transition When
Select Selects B
CL 50 pF (Figure 1)
tS’
Propagation Delay to Logical ‘‘1’’ Transition When
Select Selects B
CL 50 pF (Figure 1)
Min Typ Max Units
5
7
ns
9 12 ns
6
8
ns
9 13 ns
5
8
ns
22 35 ns
6
9
ns
22 35 ns
10 15 ns
8 15 ns
15 25 ns
10 25 ns
12 15 ns
14 17 ns
16 20 ns
14 20 ns
Schematic Diagram
DS1648 DS3648 only
TL F 7506 3
3