93L34 Datasheet, PDF (3/8 Pages) National Semiconductor (TI) – Easily expandable

Switching Characteristics V_CC a5 0V T_A
Symbol
Parameter
t_PLH
t_PHL
t_PLH
t_PHL
t_PLH
t_PHL
t_PHL
Propagation Delay
E to Q_n
Propagation Delay
D to Q_n
Propagation Delay
A_n to Q_n
Propagation Delay
CL to Q_n
a25 C (See Section 1 for Test Waveforms and Output Load)
C_L 15 pF
Min
Max
45
42
65
45
66
66
Units
ns
ns
ns
55
ns
Functional Description
The 93L34 has four modes of operation which are shown in
the Mode Select Table In the addressable latch mode data
on the data line (D) is written into the addressed latch The
addressed latch will follow the Data input with all non-ad-
dressed latches remaining in their previous states In the
memory mode all latches remain in their previous state and
are unaffected by the data or address inputs To eliminate
the possibility of entering erroneous data into the latches
the Enable should be held HIGH while the Address lines are
changing In the 1-of-8 decoding or demultiplexing mode
the addressed output will follow the state of the D input with
all other outputs in the LOW state In the clear mode all
outputs are LOW and unaffected by the address and data
inputs When operating the 93L34 as an addressable latch
changing more than one bit of the address could impose a
transient wrong address Therefore this should only be
done while in the memory mode
Mode Select Table
E
CL
Mode
L
H
Addressable Latch
H
H
Memory
L
L
Active HIGH 8-Channel Demultiplexer
H
L
Clear
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