9324 Datasheet, PDF (3/6 Pages) National Semiconductor (TI) – 5-Bit Comparator

Switching Characteristics
V_CC e a5 0V T_A e a25 C (See Section 1 for waveforms and load configurations)
Symbol
Parameter
C_L e 15 pF
Min
Max
t_PLH
Propagation Delay
14
t_PHL
E to A e B
14
t_PLH
Propagation Delay
25
t_PHL
A_n B_n to A ^l B
22
t_PLH
Propagation Delay
26
t_PHL
A_n B_n to A ^k B
21
t_PLH
Propagation Delay
30
t_PHL
A_n B_n to A e B
32
Units
ns
ns
ns
ns
Functional Description
The ’24 5-bit comparators use combinational circuitry to di-
rectly generate ‘‘A greater than B’’ and ‘‘A less than B’’
outputs As evident from the logic diagram these outputs
are generated in only three gate delays The ‘‘A equals B’’
output is generated in one additional gate delay by decoding
the ‘‘A neither less than nor greater than B’’ condition with a
NOR gate All three outputs are activated by the active LOW
Enable Input (E)
Tying the A ^l B output from one device into an A input on
another device and the A ^k B output into the corresponding
B input permits easy expansion
The A4 and B4 inputs are the most significant inputs and
A0 B0 the least significant Thus if A4 is HIGH and B4 is
LOW the A ^l B output will be HIGH regardless of all other
inputs except E
Logic Symbol
Truth Table
Inputs
E
A_n
B_n
H
X
X
L Word A e Word B
L Word A ^l Word B
L Word B ^l Word A
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
Outputs
A^kB A^lB AeB
L
L
L
L
L
H
L
H
L
H
L
L
V_CC e Pin 16
GND e Pin 6
TL F 9792 – 2
3