LP3907 Datasheet, PDF (29/42 Pages) National Semiconductor (TI) – Dual High-Current Step-Down DC/DC and Dual Linear Regulator with I2C Compatible Interface

EN_DLY PRESET DELAY SEQUENCE AFTER EN_T ASSERTION
EN_DLY<2:0>
000
001
010
011
100
101
110
111
Buck1
1
1
1.5
1.5
1.5
1.5
3
2
Delay (ms)
Buck2
1
1.5
2
2
2
1.5
2
3
LDO1
1
2
3
1
3
2
1
6
LDO2
1
2
6
1
6
2
1.5
11
BUCK AND LDO OUTPUT VOLTAGE ENABLE REGISTER (BKLDOEN) – 0X10
This register controls the enables for the Bucks and LDOs.
Name
Access
Data
D7
—
—
Reserved
Reset 0
D6
LDO2EN
R/W
0 – Disable
1 – Enable
1
D5
—
—
Reserved
1
D4
LDO1EN
R/W
0 – Disable
1 – Enable
1
D3
—
—
Reserved
0
D2
BK2EN
R/W
0 – Disable
1 – Enable
1
D1
—
—
Reserved
0
D0
BK1EN
R/W
0 – Disable
1 – Enable
1
BUCK AND LDO STATUS REGISTER (BKLDOSR) – 0X11
This register monitors whether the Bucks and LDOs meet the voltage output specifications.
D7
Name BKS_OK
Access R
Data
0 – Buck 1-2
Not Valid
1 – Bucks
Valid
Reset 0
D6
D5
D4
D3
LDOS_OK
LDO2_OK
LDO1_OK
—
R
R
R
—
0 – LDO 1-2 0 – LDO2 Not 0 – LDO1 Not Reserve
Not Valid
Valid
Valid
d
1 – LDOs Valid 1 – LDO2 Valid 1 – LDO1 Valid
0
0
0
0
D2
BK2_OK
R
0 – Buck2 Not
Valid
1 – Buck2
Valid
0
D1
—
—
Reserve
d
0
D0
BK1_OK
R
0 – Buck1 Not
Valid
1 – Buck1
Valid
0
BUCK VOLTAGE CHANGE CONTROL REGISTER 1 (VCCR) – 0X20
This register selects and controls the output target voltages for the buck regulators.
Name
Access
Data
D7-6
—
—
Reserved
Reset 00
D5
D4
D3-2
B2VS
B2GO
—
R/W
R/W
—
Buck2 Target Voltage Buck2 Voltage Ramp Reserved
Select
CTRL
0 – B2VT1
0 – Hold
1 – B2VT2
1 – Ramp to B2VS
selection
0
0
00
D1
D0
B1VS
B1GO
R/W
R/W
Buck1 Target Voltage Buck1 Voltage Ramp
Select
CTRL
0 – B1VT1
0 – Hold
1 – B1VT2
1 – Ramp to B1VS
selection
0
0
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