OPA2889 Datasheet, PDF (27/38 Pages) Burr-Brown (TI) – Dual, Low-Power, Wideband, Voltage Feedback OPERATIONAL AMPLIFIER with Disable

OPA2889
www.ti.com ....................................................................................................................................................... SBOS373B – JUNE 2007 – REVISED AUGUST 2008
As a worst-case example, compute the maximum T_J
using an OPA2889ID (SO-8 package) in the circuit of
Figure 50 operating at the maximum specified
ambient temperature of +85°C and with both outputs
driving a grounded 75Ω load to +2.5V.
P_D = 10V ´ 2.5mA + 2[5²/(4 ´ (75W || 1.5kW))] = 200mW
Maximum T_J = +85°C + (200mW ´ 125°C/W) = +110°C
This absolute worst-case condition does not exceed
the specified maximum junction temperature. Actual
P_DL is normally less than that considered here.
Carefully consider maximum T_J in your application.
BOARD LAYOUT GUIDELINES
Achieving optimum performance with a
high-frequency amplifier like the OPA2889 requires
careful attention to board layout parasitics and
external component types. Recommendations that
optimize performance include:
a) Minimize parasitic capacitance to any ac ground
for all of the signal I/O pins. Parasitic capacitance on
the output and inverting input pins can cause
instability: on the noninverting input, it can react with
the source impedance to cause unintentional
bandlimiting. To reduce unwanted capacitance, a
window around the signal I/O pins should be opened
in all of the ground and power planes around those
pins. Otherwise, ground and power planes should be
unbroken elsewhere on the board.
b) Minimize the distance (< 0.25") from the
power-supply pins to high-frequency 0.1µF
decoupling capacitors. At the device pins, the ground
and power-plane layout should not be in close
proximity to the signal I/O pins. Avoid narrow power
and ground traces to minimize inductance between
the pins and the decoupling capacitors. The
power-supply connections should always be
decoupled with these capacitors. An optional supply
decoupling capacitor (0.1µF) across the two power
supplies (for bipolar operation) improves
2nd-harmonic distortion performance. Larger (2.2µF
to 6.8µF) decoupling capacitors, effective at lower
frequencies, should also be used on the main supply
pins. These capacitors may be placed somewhat
farther from the device and may be shared among
several devices in the same area of the printed circuit
board (PCB).
c) Careful selection and placement of external
components preserves the high-frequency
performance of the OPA2889. Resistors should be
a very low reactance type. Surface-mount resistors
work best and allow a tighter overall layout. Metal film
or carbon composition axially-leaded resistors can
also provide good high-frequency performance.
Again, keep the leads and PCB traces as short as
possible. Never use wirewound type resistors in a
high-frequency application. Since the output pin and
inverting input pin are the most sensitive to parasitic
capacitance, always position the feedback and series
output resistor, if any, as close as possible to the
output pin. Other network components, such as
noninverting input termination resistors, should also
be placed close to the package. Even with a low
parasitic capacitance shunting the external resistors,
excessively high resistor values can create significant
time constants that can degrade performance. Good
axial metal film or surface-mount resistors have
approximately 0.2pF in shunt with the resistor. For
resistor values > 1.5kΩ, this parasitic capacitance
can add a pole and/or zero below 500MHz that can
effect circuit operation. Keep resistor values as low
as possible consistent with load driving
considerations. The 750Ω feedback used in the
Electrical Characteristics is a good starting point for
design. Note that a 0Ω feedback resistor is suggested
for the unity-gain follower application.
d) Connections to other wideband devices on the
board may be made with short, direct traces or
through onboard transmission lines. For short
connections, consider the trace and the input to the
next device as a lumped capacitive load. Relatively
wide traces (50mils to 100mils) should be used,
preferably with ground and power planes opened up
around them. Estimate the total capacitive load and
set R_S from the plots of Figure 15 and Figure 16. Low
parasitic capacitive loads (< 3pF) may not need an
R_S because the OPA2889 is nominally compensated
to operate with a 2pF parasitic load. Higher parasitic
capacitive loads without an R_S are allowed as the
signal gain increases (increasing the unloaded phase
margin; see Figure 24). If a long trace is required,
and the 6dB signal loss intrinsic to a
doubly-terminated transmission line is acceptable,
implement a matched impedance transmission line
using microstrip or stripline techniques (consult an
ECL design handbook for microstrip and stripline
layout techniques). A 50Ω environment is normally
not necessary on board, and in fact, a higher
impedance environment improves distortion as shown
in the distortion versus load plots. With a
characteristic board trace impedance defined (based
on board material and trace dimensions), a matching
series resistor into the trace from the output of the
OPA2889 is used as well as a terminating shunt
resistor at the input of the destination device.
Remember also that the terminating impedance is the
parallel combination of the shunt resistor and the
input impedance of the destination device; this total
effective impedance should be set to match the trace
impedance.
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): OPA2889
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