THS4505 Datasheet, PDF (25/45 Pages) Texas Instruments – WIDEBAND, LOW-DISTORTION, FULLY DIFFERENTIAL AMPLIFIERS

THS4504
THS4505
www.ti.com ......................................................................................................................................................... SLOS363D – AUGUST 2002 – REVISED MAY 2008
SAVING POWER WITH POWER-DOWN
FUNCTIONALITY
The THS4500 family of fully differential amplifiers
contains devices that come with and without the
power-down option. Even-numbered devices have
power-down capability, which is described in detail
here.
The power-down pin of the amplifiers defaults to the
positive supply voltage in the absence of an applied
voltage (i.e. an internal pullup resistor is present),
putting the amplifier in the power-on mode of
operation. To turn off the amplifier in an effort to
conserve power, the power-down pin can be driven
towards the negative rail. The threshold voltages for
power-on and power-down are relative to the supply
rails and given in the specification tables. Above the
enable threshold voltage, the device is on. Below the
disable threshold voltage, the device is off. Behavior
in between these threshold voltages is not specified.
Note that this power-down functionality is just that;
the amplifier consumes less power in power-down
mode. The power-down mode is not intended to
provide a high-impedance output. In other words, the
power-down functionality is not intended to allow use
as a 3-state bus driver. When in power-down mode,
the impedance looking back into the output of the
amplifier is dominated by the feedback and gain
setting resistors.
The time delays associated with turning the device on
and off are specified as the time it takes for the
amplifier to reach 50% of the nominal quiescent
current. The time delays are on the order of
microseconds because the amplifier moves in and out
of the linear mode of operation in these transitions.
LINEARITY: DEFINITIONS, TERMINOLOGY,
CIRCUIT TECHNIQUES, AND DESIGN
TRADEOFFS
The THS4500 family of devices features
unprecedented distortion performance for monolithic
fully differential amplifiers. This section focuses on
the fundamentals of distortion, circuit techniques for
reducing nonlinearity, and methods for equating
distortion of fully differential amplifiers to desired
linearity specifications in RF receiver chains.
Amplifiers are generally thought of as linear devices.
In other words, the output of an amplifier is a linearly
scaled version of the input signal applied to it. In
reality, however, amplifier transfer functions are
nonlinear. Minimizing amplifier nonlinearity is a
primary design goal in many applications.
Intercept points are specifications that have long
been used as key design criteria in the RF
communications world as a metric for the
intermodulation distortion performance of a device in
the signal chain (for example, amplifiers, mixers,
etc.). Use of the intercept point, rather than strictly the
intermodulation distortion, allows for simpler
system-level calculations. Intercept points, like noise
figures, can be easily cascaded back and forth
through a signal chain to determine the overall
receiver chain intermodulation distortion performance.
The relationship between intermodulation distortion
and intercept point is depicted in Figure 85 and
Figure 86.
P_O P_O
∆f_c = f_c − f1
∆f_c = f2 − f_c
IMD₃ = P_S − P_O
P_S
P_S
f_c − 3∆f f1 f_c f2 f_c + 3∆f
f − Frequency − MHz
Figure 85. 2-Tone and 3rd-Order Intermodulation
Products
Due to the intercept point's ease of use in system
level calculations for receiver chains, it has become
the specification of choice for guiding
distortion-related design decisions. Traditionally,
these systems use primarily class-A, single-ended RF
amplifiers as gain blocks. These RF amplifiers are
typically designed to operate in a 50-Ω environment,
just like the rest of the receiver chain. Since intercept
points are given in dBm, this implies an associated
impedance (50 Ω).
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