ISP1302_07 Datasheet, PDF (25/64 Pages) NXP Semiconductors – Universal Serial Bus On-The-Go transceiver with carkit support

NXP Semiconductors
ISP1302
USB OTG transceiver with carkit support
Table 20.
Bit
Symbol
Reset
Access
Mode Control 1 register (address S = 04h, C = 05h) bit allocation
7
6
5
4
3
reserved UART_EN OE_INT_
BDIS_ TRANSP_
EN
ACON_EN
EN
0
0/1
0
0
0
R/S/C
R/S/C
R/S/C
R/S/C
R/S/C
2
DAT_SE0
0
R/S/C
1
SUSPEND
0
R/S/C
0
SPEED
0
R/S/C
Table 21. Mode Control 1 register (address S = 04h, C = 05h) bit description
Bit Symbol
Description
7-
reserved
6 UART_EN
When set, the ATX is in transparent UART mode. The default value of this
bit depends on the SERVICE_N pin. On reset, if SERVICE_N = HIGH, the
reset value of UART_EN = 0; if SERVICE_N = LOW, the reset value of
UART_EN = 1.
5 OE_INT_EN When set and when in suspend mode, pin OE_N/INT_N becomes an
output and is asserted when an interrupt occurs.
4 BDIS_ACON_ This bit has two functions:
EN
For an A-device, this bit works as BDIS_ACON_EN. It enables the A-device
to connect if the B-device disconnect is detected; see Section 7.10.
0 — DP pull-up resistor is controlled by the DP_PULLUP bit in the OTG
Control register.
1 — DP pull-up resistor will connect on the B-device disconnect.
For a B-device, this bit works as ACON_BSE0_EN. It enables the B-device
to drive SE0 on DP and DM, if the A-device connect is detected.
0 — B-device will stop driving SE0.
1 — B-device will start to drive SE0, if the A-device connect is detected.
3 TRANSP_EN When set, the ATX is in transparent general-purpose buffer mode.
2 DAT_SE0
0 — VP_VM mode
1 — DAT_SE0 mode
1 SUSPEND Sets the transceiver in low-power mode.
0 — Active-power mode
1 — Low-power mode (differential receiver is disabled if SPEED = 1)
0 SPEED
Set the rise time and the fall time of the transmit driver in USB modes.
0 — Low-speed mode
1 — Full-speed mode
9.1.2.2 Mode Control 2 register
For the bit allocation of this register, see Table 22.
Table 22.
Bit
Symbol
Reset
Access
Mode Control 2 register (address S = 12h, C = 13h) bit allocation
7
6
5
4
3
reserved
PSW_OE AUDIO_EN TRANSP_ TRANSP_
BDIR1
BDIR0
0
0
0
0
0
R/S/C
R/S/C
R/S/C
R/S/C
R/S/C
2
1
reserved
1
R/S/C
0
R/S/C
0
PWR_DN
0
R/S/C
ISP1302_1
Product data sheet
Rev. 01 — 24 May 2007
© NXP B.V. 2007. All rights reserved.
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