COP87L88FH Datasheet, PDF (24/45 Pages) National Semiconductor (TI) – 8-Bit CMOS OTP Microcontrollers with 16k Memory,

Multiply/Divide (Continued)
TABLE 5. Multiply/Divide Registers
Register Name
(Address)
MDR1 (xx98)
MDR2 (xx99)
MDR3 (xx9A)
MDR4 (xx9B)
MDR5 (xx9C)
Multiplication Assignment
Before Operation
After Operation
Unused
Unchanged
Multiplier
Low Byte of Result
Middle Byte of Result
Low Byte of
Multiplicand
High Byte of Result
High Byte of
Multiplicand
Unchanged
Division Assignment
Before Operation
After Operation
Low Byte of Dividend
Low Byte of Result
Middle Byte of Dividend
High Byte of Result
High Byte of Dividend
Undefined
Low Byte of Divisor
Low Byte of Divisor
High Byte of Divisor
High Byte of Divisor
Interrupts
Introduction
Each device supports thirteen vectored interrupts. Interrupt
sources include Timer 0, Timer 1, Timer 2, Timer 3, Port L
Wakeup, Software Trap, MICROWIRE/PLUS, and External
Input.
All interrupts force a branch to location 00FF Hex in program
memory. The VIS instruction may be used to vector to the
appropriate service routine from location 00FF Hex.
The Software trap has the highest priority while the default
VIS has the lowest priority.
Each of the 13 maskable inputs has a fixed arbitration rank-
ing and vector.
Figure 16 shows the Interrupt Block diagram.
FIGURE 16. Interrupt Block Diagram
DS101135-20
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