THS4051 Datasheet, PDF (22/36 Pages) Texas Instruments – 70-MHz HIGH-SPEED AMPLIFIERS

THS4051
THS4052
SLOS238D − MAY 1999 − REVISED AUGUST 2008
APPLICATION INFORMATION
www.ti.com
GENERAL POWERPAD DESIGN CONSIDERATIONS (CONTINUED)
The actual thermal performance achieved with the THS405xDGN in its PowerPAD package depends on the application.
In the example above, if the size of the internal ground plane is approximately 3 inches × 3 inches (or 76.2 mm × 76.2 mm),
then the expected thermal coefficient, θ_JA, is about 58.4°C/W. For comparison, the non-PowerPAD version of the
THS405x IC (SOIC) is shown. For a given θ_JA, the maximum power dissipation is shown in Figure 53 and is calculated
by the following formula:
ǒ Ǔ PD +
TMAX–TA
q_JA
Where:
P_D = Maximum power dissipation of THS405x IC (watts)
T_MAX = Absolute maximum junction temperature (150°C)
T_A = Free-ambient air temperature (°C)
θ_JA = θ_JC + θ_CA
θ_JC = Thermal coefficient from junction to case
θ_CA = Thermal coefficient from case to ambient air (°C/W)
MAXIMUM POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
3.5
DGN Package
θ_JA = 58.4°C/W
TJ = 150°C
3
2 oz. Trace And Copper Pad
With Solder
2.5
SOIC Package
High-K Test PCB
2 θJA = 98°C/W
DGN Package
θ_JA = 158°C/W
2 oz. Trace And
Copper Pad
Without Solder
1.5
1
0.5 ^{SOIC Package}
Low-K Test PCB
θ_JA = 167°C/W
0
−40 −20 0 20 40 60 80 100
TA − Free-Air Temperature − °C
NOTE A: Results are with no air flow and PCB size = 3”× 3”
Figure 53. Maximum Power Dissipation vs Free-Air Temperature
More complete details of the PowerPAD installation process and thermal management techniques can be found in the
Texas Instruments Technical Brief, PowerPAD  Thermally Enhanced Package. This document can be found at the TI web
site (www.ti.com) by searching on the key word PowerPAD. The document can also be ordered through your local TI sales
office. Refer to literature number SLMA002 when ordering.
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