ADC10731_06 Datasheet, PDF (22/29 Pages) National Semiconductor (TI) – 10-Bit Plus Sign Serial I/O A/D Converters with Mux, Sample/Hold and Reference

Applications Hints (Continued)
3.0 APPLICATIONS INFORMATION
3.1 Multiplexer Configuration
The design of these converters utilizes a sampled-data com-
parator structure, which allows a differential analog input to
be converted by the successive approximation routine.
The actual voltage converted is always the difference be-
tween an assigned “+” input terminal and a “−” input terminal.
The polarity of each input terminal or pair of input terminals
being converted indicates which line the converter expects
to be the most positive.
A unique input multiplexing scheme has been utilized to
provide multiple analog channels. The input channels can be
software configured into three modes: differential, single-
ended, or pseudo-differential. Figure 13 illustrates the three
modes using the 4-channel MUX of the ADC10734. The
eight inputs of the ADC10738 can also be configured in any
of the three modes. The single-ended mode has CH0–CH3
assigned as the positive input with COM serving as the
negative input. In the differential mode, the ADC10734 chan-
nel inputs are grouped in pairs, CH0 with CH1 and CH2 with
CH3. The polarity assignment of each channel in the pair is
interchangeable. Finally, in the pseudo-differential mode
CH0–CH3 are positive inputs referred to COM which is now
a pseudo-ground. This pseudo-ground input can be set to
any potential within the input common-mode range of the
converter. The analog signal conditioning required in
transducer-based data acquisition systems is significantly
simplified with this type of input flexibility. One converter
package can now handle ground-referred inputs and true
differential inputs as well as signals referred to a specific
voltage.
The analog input voltages for each channel can range from
50 mV below GND to 50 mV above V⁺ = DV⁺ = AV⁺ without
degrading conversion accuracy. If the voltage on an unse-
lected channel exceeds these limits it may corrupt the read-
ing of the selected channel.
3.2 Reference Considerations
The voltage difference between the V_REF+ and V_REF− inputs
defines the analog input voltage span (the difference be-
tween V_IN(Max) and V_IN(Min)) over which 1023 positive and
1024 negative possible output codes apply.
The value of the voltage on the V_REF+ or V_REF− inputs can be
anywhere between AV⁺ + 50 mV and −50 mV, so long as
V_REF+ is greater than V_REF−. The ADC10731/2/4/8 can be
used in either ratiometric applications or in systems requiring
absolute accuracy. The reference pins must be connected to
a voltage source capable of driving the minimum reference
input resistance of 5 kΩ.
The internal 2.5V bandgap reference in the ADC10731/2/4/8
is available as an output on the VREFOut pin. To ensure
optimum performance this output needs to be bypassed to
ground with 100 µF aluminum electrolytic or tantalum ca-
pacitor. The reference output can be unstable with capacitive
loads greater than 100 pF and less than 100 µF. Any capaci-
tive loading less than 100 pF and greater than 100 µF will not
cause oscillation. Lower output noise can be obtained by
increasing the output capacitance. A 100 µF capacitor will
yield a typical noise floor of
.
The pseudo-differential and differential multiplexer modes
allow for more flexibility in the analog input voltage range
since the “zero” reference voltage is set by the actual voltage
applied to the assigned negative input pin.
In a ratiometric system (Figure 14), the analog input voltage
is proportional to the voltage used for the A/D reference. This
voltage may also be the system power supply, so V_REF+ can
also be tied to AV⁺. This technique relaxes the stability
requirements of the system reference as the analog input
and A/D reference move together maintaining the same
output code for a given input condition.
For absolute accuracy (Figure 15), where the analog input
varies between very specific voltage limits, the reference pin
can be biased with a time- and temperature-stable voltage
source that has excellent initial accuracy. The LM4040,
LM4041 and LM185 references are suitable for use with the
ADC10731/2/4/8.
The minimum value of V_REF (V_REF = V_REF+–V_REF−) can be
quite small (see Typical Performance Characteristics) to al-
low direct conversion of transducer outputs providing less
than a 5V output span. Particular care must be taken with
regard to noise pickup, circuit layout and system error volt-
age sources when operating with a reduced span due to the
increased sensitivity of the converter (1 LSB equals V_REF/
1024).
3.3 The Analog Inputs
Due to the sampling nature of the analog inputs, at the clock
edges short duration spikes of current will be seen on the
selected assigned negative input. Input bypass capacitors
should not be used if the source resistance is greater than
1 kΩ since they will average the AC current and cause an
effective DC current to flow through the analog input source
resistance. An op amp RC active lowpass filter can provide
both impedance buffering and noise filtering should a high
impedance signal source be required. Bypass capacitors
may be used when the source impedance is very low without
any degradation in performance.
In a true differential input stage, a signal that is common to
both “+” and “−” inputs is canceled. For the ADC10731/2/4/8,
the positive input of a selected channel pair is only sampled
once before the start of a conversion during the acquisition
time (t_A). The negative input needs to be stable during the
complete conversion sequence because it is sampled before
each decision in the SAR sequence. Therefore, any AC
common-mode signal present on the analog inputs will not
be completely canceled and will cause some conversion
errors. For a sinusoid common-mode signal this error is:
V_ERROR(max) = V_PEAK (2 π f_CM) (t_C)
where f_CM is the frequency of the common-mode signal,
V_PEAK is its peak voltage value, and t_C is the A/D’s conver-
sion time (t_C = 12/f_CLK). For example, for a 60 Hz common-
mode signal to generate a ¹â„4 LSB error (0.61 mV) with a 4.8
µs conversion time, its peak value would have to be approxi-
mately 337 mV.
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