THS4221 Datasheet, PDF (21/41 Pages) Texas Instruments – LOW-DISTORTION, HIGH-SPEED, RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS

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P _Dmax
+
T_max–T_A
q_JA
where:
P_Dmax is the maximum power dissipation in the amplifier (W).
T_max is the absolute maximum junction temperature (°C).
T_A is the ambient temperature (°C).
θ_JA = θ_JC + θ_CA
θ_JC is the thermal coefficient from the silicon junctions to the
case (°C/W).
θ_CA is the thermal coefficient from the case to ambient air
(°C/W).
For systems where heat dissipation is more critical, the
THS4222 family is offered in MSOP with PowerPAD. The
thermal coefficient for the MSOP PowerPAD package is
substantially improved over the traditional SOIC.
Maximum power dissipation levels are depicted in the
graph for the two packages. The data for the DGN
package assumes a board layout that follows the
PowerPAD layout guidelines referenced above and
detailed in the PowerPAD application notes in the
Additional Reference Material section at the end of the
data sheet.
3.5
8-Pin DGN Package
3
2.5
2
8-Pin D Package
1.5
1
0.5
0
−40 −20 0
20 40 60 80
T_A − Ambient Temperature − °C
θ_JA = 170°C/W for 8-Pin SOIC (D)
θ_JA = 58.4°C/W for 8-Pin MSOP (DGN)
Τ_J = 150°C, No Airflow
Figure 38. Maximum Power Dissipation vs
Ambient Temperature
When determining whether or not the device satisfies the
maximum power dissipation requirement, it is important to
consider not only quiescent power dissipation, but also
dynamic power dissipation. Often maximum power
dissipation is difficult to quantify because the signal pattern
is inconsistent, but an estimate of the RMS power
dissipation can provide visibility into a possible problem.
THS4221, THS4225
THS4222, THS4226
SLOS399G − AUGUST 2002 − REVISED JANUARY 2004
DESIGN TOOLS
Evaluation Fixtures, Spice Models, and
Applications Support
Texas Instruments is committed to providing its customers
with the highest quality of applications support. To support
this goal, evaluation boards have been developed for the
THS4222 family of operational amplifiers. The boards are
easy to use, allowing for straight-forward evaluation of the
device. These evaluation boards can be ordered through
the Texas Instruments web site, www.ti.com, or through
your local Texas Instruments sales representative.
Schematics for the two evaluation boards are shown
below with their default component values. Unpopulated
footprints are shown to provide insight into design
flexibility.
R6
J2
R1
VS+
R2 _J3
R6
J1
U1:A
R4
R3
PwrPad
VS−
R7
J4
R8
R9 _J5
U1:B
R10
R11
J6
R12
J7
VS−
FB1
C9
C7
GND TP1
VS−
C6
+
VS+
C5 ⁺
J9
VS+
FB2
C8
C10
Figure 39. THS4222 EVM Circuit
Configuration
21